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Side by Side Diff: src/IceTargetLoweringARM32.cpp

Issue 1411583007: Combine allocas (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Finish fast path. Created 5 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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232 } 232 }
233 } 233 }
234 } // end of anonymous namespace 234 } // end of anonymous namespace
235 235
236 void TargetARM32::translateO2() { 236 void TargetARM32::translateO2() {
237 TimerMarker T(TimerStack::TT_O2, Func); 237 TimerMarker T(TimerStack::TT_O2, Func);
238 238
239 // TODO(stichnot): share passes with X86? 239 // TODO(stichnot): share passes with X86?
240 // https://code.google.com/p/nativeclient/issues/detail?id=4094 240 // https://code.google.com/p/nativeclient/issues/detail?id=4094
241 241
242 // Do not merge Alloca instructions, and lay out the stack.
243 static constexpr bool SortAndCombineAllocas = false;
244 Func->processAllocas(SortAndCombineAllocas);
245 Func->dump("After Alloca processing");
246
242 if (!Ctx->getFlags().getPhiEdgeSplit()) { 247 if (!Ctx->getFlags().getPhiEdgeSplit()) {
243 // Lower Phi instructions. 248 // Lower Phi instructions.
244 Func->placePhiLoads(); 249 Func->placePhiLoads();
245 if (Func->hasError()) 250 if (Func->hasError())
246 return; 251 return;
247 Func->placePhiStores(); 252 Func->placePhiStores();
248 if (Func->hasError()) 253 if (Func->hasError())
249 return; 254 return;
250 Func->deletePhis(); 255 Func->deletePhis();
251 if (Func->hasError()) 256 if (Func->hasError())
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333 if (Ctx->getFlags().shouldDoNopInsertion()) { 338 if (Ctx->getFlags().shouldDoNopInsertion()) {
334 Func->doNopInsertion(); 339 Func->doNopInsertion();
335 } 340 }
336 } 341 }
337 342
338 void TargetARM32::translateOm1() { 343 void TargetARM32::translateOm1() {
339 TimerMarker T(TimerStack::TT_Om1, Func); 344 TimerMarker T(TimerStack::TT_Om1, Func);
340 345
341 // TODO: share passes with X86? 346 // TODO: share passes with X86?
342 347
348 // Do not merge Alloca instructions, and lay out the stack.
349 static constexpr bool SortAndCombineAllocas = false;
350 Func->processAllocas(SortAndCombineAllocas);
351 Func->dump("After Alloca processing");
352
343 Func->placePhiLoads(); 353 Func->placePhiLoads();
344 if (Func->hasError()) 354 if (Func->hasError())
345 return; 355 return;
346 Func->placePhiStores(); 356 Func->placePhiStores();
347 if (Func->hasError()) 357 if (Func->hasError())
348 return; 358 return;
349 Func->deletePhis(); 359 Func->deletePhis();
350 if (Func->hasError()) 360 if (Func->hasError())
351 return; 361 return;
352 Func->dump("After Phi lowering"); 362 Func->dump("After Phi lowering");
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4738 // Technically R9 is used for TLS with Sandboxing, and we reserve it. 4748 // Technically R9 is used for TLS with Sandboxing, and we reserve it.
4739 // However, for compatibility with current NaCl LLVM, don't claim that. 4749 // However, for compatibility with current NaCl LLVM, don't claim that.
4740 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; 4750 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n";
4741 } 4751 }
4742 4752
4743 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM]; 4753 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM];
4744 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; 4754 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
4745 llvm::SmallBitVector TargetARM32::ScratchRegs; 4755 llvm::SmallBitVector TargetARM32::ScratchRegs;
4746 4756
4747 } // end of namespace Ice 4757 } // end of namespace Ice
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