| OLD | NEW |
| 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 83 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 94 Vars[I++] = Base; | 94 Vars[I++] = Base; |
| 95 if (Index) | 95 if (Index) |
| 96 Vars[I++] = Index; | 96 Vars[I++] = Index; |
| 97 assert(I == NumVars); | 97 assert(I == NumVars); |
| 98 } | 98 } |
| 99 } | 99 } |
| 100 | 100 |
| 101 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const { | 101 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const { |
| 102 if (!BuildDefs::dump()) | 102 if (!BuildDefs::dump()) |
| 103 return; | 103 return; |
| 104 const ::Ice::TargetLowering *Target = Func->getTarget(); |
| 105 // If the base is rematerializable, we need to replace it with the correct |
| 106 // physical register (esp or ebp), and update the Offset. |
| 107 int32_t Disp = 0; |
| 108 if (getBase() && getBase()->isRematerializable()) { |
| 109 Disp += getBase()->getStackOffset(); |
| 110 if (!getIgnoreStackAdjust()) |
| 111 Disp += Target->getStackAdjustment(); |
| 112 } |
| 113 // The index should never be rematerializable. But if we ever allow it, then |
| 114 // we should make sure the rematerialization offset is shifted by the Shift |
| 115 // value. |
| 116 if (getIndex()) |
| 117 assert(!getIndex()->isRematerializable()); |
| 104 Ostream &Str = Func->getContext()->getStrEmit(); | 118 Ostream &Str = Func->getContext()->getStrEmit(); |
| 105 if (SegmentReg != DefaultSegment) { | 119 if (SegmentReg != DefaultSegment) { |
| 106 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 120 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |
| 107 Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; | 121 Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; |
| 108 } | 122 } |
| 109 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading | 123 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading |
| 110 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. | 124 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. |
| 111 if (!Offset) { | 125 if (getOffset() == 0 && Disp == 0) { |
| 112 // No offset, emit nothing. | 126 // No offset, emit nothing. |
| 113 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { | 127 } else if (getOffset() == 0 && Disp != 0) { |
| 114 if (Base == nullptr || CI->getValue()) | 128 Str << Disp; |
| 129 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
| 130 if (getBase() == nullptr || CI->getValue() || Disp != 0) |
| 115 // Emit a non-zero offset without a leading '$'. | 131 // Emit a non-zero offset without a leading '$'. |
| 116 Str << CI->getValue(); | 132 Str << CI->getValue() + Disp; |
| 117 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { | 133 } else if (const auto *CR = |
| 134 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |
| 135 // TODO(sehr): ConstantRelocatable still needs updating for |
| 136 // rematerializable base/index and Disp. |
| 137 assert(Disp == 0); |
| 118 CR->emitWithoutPrefix(Func->getTarget()); | 138 CR->emitWithoutPrefix(Func->getTarget()); |
| 119 } else { | 139 } else { |
| 120 llvm_unreachable("Invalid offset type for x86 mem operand"); | 140 llvm_unreachable("Invalid offset type for x86 mem operand"); |
| 121 } | 141 } |
| 122 | 142 |
| 123 if (Base || Index) { | 143 if (getBase() || getIndex()) { |
| 124 Str << "("; | 144 Str << "("; |
| 125 if (Base) | 145 if (getBase()) |
| 126 Base->emit(Func); | 146 getBase()->emit(Func); |
| 127 if (Index) { | 147 if (getIndex()) { |
| 128 Str << ","; | 148 Str << ","; |
| 129 Index->emit(Func); | 149 getIndex()->emit(Func); |
| 130 if (Shift) | 150 if (getShift()) |
| 131 Str << "," << (1u << Shift); | 151 Str << "," << (1u << getShift()); |
| 132 } | 152 } |
| 133 Str << ")"; | 153 Str << ")"; |
| 134 } | 154 } |
| 135 } | 155 } |
| 136 | 156 |
| 137 void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func, | 157 void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func, |
| 138 Ostream &Str) const { | 158 Ostream &Str) const { |
| 139 if (!BuildDefs::dump()) | 159 if (!BuildDefs::dump()) |
| 140 return; | 160 return; |
| 141 if (SegmentReg != DefaultSegment) { | 161 if (SegmentReg != DefaultSegment) { |
| 142 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 162 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |
| 143 Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; | 163 Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; |
| 144 } | 164 } |
| 145 bool Dumped = false; | 165 bool Dumped = false; |
| 146 Str << "["; | 166 Str << "["; |
| 147 if (Base) { | 167 int32_t Disp = 0; |
| 168 if (getBase() && getBase()->isRematerializable()) { |
| 169 Disp += getBase()->getStackOffset(); |
| 170 if (!getIgnoreStackAdjust()) |
| 171 Disp += Func->getTarget()->getStackAdjustment(); |
| 172 } |
| 173 if (getBase()) { |
| 148 if (Func) | 174 if (Func) |
| 149 Base->dump(Func); | 175 getBase()->dump(Func); |
| 150 else | 176 else |
| 151 Base->dump(Str); | 177 getBase()->dump(Str); |
| 152 Dumped = true; | 178 Dumped = true; |
| 153 } | 179 } |
| 154 if (Index) { | 180 if (getIndex()) { |
| 155 if (Base) | 181 assert(!getIndex()->isRematerializable()); |
| 182 if (getBase()) |
| 156 Str << "+"; | 183 Str << "+"; |
| 157 if (Shift > 0) | 184 if (getShift() > 0) |
| 158 Str << (1u << Shift) << "*"; | 185 Str << (1u << getShift()) << "*"; |
| 159 if (Func) | 186 if (Func) |
| 160 Index->dump(Func); | 187 getIndex()->dump(Func); |
| 161 else | 188 else |
| 162 Index->dump(Str); | 189 getIndex()->dump(Str); |
| 163 Dumped = true; | 190 Dumped = true; |
| 164 } | 191 } |
| 165 // Pretty-print the Offset. | 192 // Pretty-print the Offset. |
| 166 bool OffsetIsZero = false; | 193 bool OffsetIsZero = false; |
| 167 bool OffsetIsNegative = false; | 194 bool OffsetIsNegative = false; |
| 168 if (!Offset) { | 195 if (getOffset() == 0 && Disp == 0) { |
| 169 OffsetIsZero = true; | 196 OffsetIsZero = true; |
| 170 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { | 197 } else if (getOffset() == 0 && Disp != 0) { |
| 171 OffsetIsZero = (CI->getValue() == 0); | 198 OffsetIsZero = (Disp == 0); |
| 172 OffsetIsNegative = (static_cast<int32_t>(CI->getValue()) < 0); | 199 OffsetIsNegative = (Disp < 0); |
| 200 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
| 201 OffsetIsZero = (CI->getValue() + Disp == 0); |
| 202 OffsetIsNegative = (static_cast<int32_t>(CI->getValue()) + Disp < 0); |
| 173 } else { | 203 } else { |
| 174 assert(llvm::isa<ConstantRelocatable>(Offset)); | 204 assert(llvm::isa<ConstantRelocatable>(getOffset()) && Disp == 0); |
| 175 } | 205 } |
| 176 if (Dumped) { | 206 if (Dumped) { |
| 177 if (!OffsetIsZero) { // Suppress if Offset is known to be 0 | 207 if (!OffsetIsZero) { // Suppress if Offset is known to be 0 |
| 178 if (!OffsetIsNegative) // Suppress if Offset is known to be negative | 208 if (!OffsetIsNegative) // Suppress if Offset is known to be negative |
| 179 Str << "+"; | 209 Str << "+"; |
| 180 Offset->dump(Func, Str); | 210 getOffset()->dump(Func, Str); |
| 181 } | 211 } |
| 182 } else { | 212 } else { |
| 183 // There is only the offset. | 213 // There is only the offset. |
| 184 Offset->dump(Func, Str); | 214 getOffset()->dump(Func, Str); |
| 185 } | 215 } |
| 186 Str << "]"; | 216 Str << "]"; |
| 187 } | 217 } |
| 188 | 218 |
| 189 void MachineTraits<TargetX8632>::X86OperandMem::emitSegmentOverride( | 219 void MachineTraits<TargetX8632>::X86OperandMem::emitSegmentOverride( |
| 190 MachineTraits<TargetX8632>::Assembler *Asm) const { | 220 MachineTraits<TargetX8632>::Assembler *Asm) const { |
| 191 if (SegmentReg != DefaultSegment) { | 221 if (SegmentReg != DefaultSegment) { |
| 192 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 222 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |
| 193 Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); | 223 Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); |
| 194 } | 224 } |
| 195 } | 225 } |
| 196 | 226 |
| 197 MachineTraits<TargetX8632>::Address | 227 MachineTraits<TargetX8632>::Address |
| 198 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress( | 228 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress( |
| 199 MachineTraits<TargetX8632>::Assembler *Asm) const { | 229 MachineTraits<TargetX8632>::Assembler *Asm, |
| 230 const Ice::TargetLowering *Target) const { |
| 200 int32_t Disp = 0; | 231 int32_t Disp = 0; |
| 232 if (getBase() && getBase()->isRematerializable()) { |
| 233 Disp += getBase()->getStackOffset(); |
| 234 if (!getIgnoreStackAdjust()) { |
| 235 Disp += Target->getStackAdjustment(); |
| 236 } |
| 237 } |
| 238 // The index should never be rematerializable. But if we ever allow it, then |
| 239 // we should make sure the rematerialization offset is shifted by the Shift |
| 240 // value. |
| 241 if (getIndex()) |
| 242 assert(!getIndex()->isRematerializable()); |
| 201 AssemblerFixup *Fixup = nullptr; | 243 AssemblerFixup *Fixup = nullptr; |
| 202 // Determine the offset (is it relocatable?) | 244 // Determine the offset (is it relocatable?) |
| 203 if (getOffset()) { | 245 if (getOffset()) { |
| 204 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 246 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
| 205 Disp = static_cast<int32_t>(CI->getValue()); | 247 Disp += static_cast<int32_t>(CI->getValue()); |
| 206 } else if (const auto CR = | 248 } else if (const auto CR = |
| 207 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { | 249 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |
| 208 Disp = CR->getOffset(); | 250 Disp += CR->getOffset(); |
| 209 Fixup = Asm->createFixup(RelFixup, CR); | 251 Fixup = Asm->createFixup(RelFixup, CR); |
| 210 } else { | 252 } else { |
| 211 llvm_unreachable("Unexpected offset type"); | 253 llvm_unreachable("Unexpected offset type"); |
| 212 } | 254 } |
| 213 } | 255 } |
| 214 | 256 |
| 215 // Now convert to the various possible forms. | 257 // Now convert to the various possible forms. |
| 216 if (getBase() && getIndex()) { | 258 if (getBase() && getIndex()) { |
| 217 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), | 259 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), |
| 218 getEncodedGPR(getIndex()->getRegNum()), | 260 getEncodedGPR(getIndex()->getRegNum()), |
| (...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 272 Var->dump(Func); | 314 Var->dump(Func); |
| 273 else | 315 else |
| 274 Var->dump(Str); | 316 Var->dump(Str); |
| 275 Str << ")"; | 317 Str << ")"; |
| 276 } | 318 } |
| 277 | 319 |
| 278 } // namespace X86Internal | 320 } // namespace X86Internal |
| 279 } // end of namespace Ice | 321 } // end of namespace Ice |
| 280 | 322 |
| 281 X86INSTS_DEFINE_STATIC_DATA(TargetX8632) | 323 X86INSTS_DEFINE_STATIC_DATA(TargetX8632) |
| OLD | NEW |