Combine allocas

src/IceCfg.h

 //===- subzero/src/IceCfg.h - Control flow graph ----------------*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 167 matching lines @@
   /// predecessor and successor edges, in the form of CfgNode::InEdges[] and
   /// CfgNode::OutEdges[].
   void computeInOutEdges();
   void renumberInstructions();
   void placePhiLoads();
   void placePhiStores();
   void deletePhis();
   void advancedPhiLowering();
   void reorderNodes();
   void shuffleNodes();
-  void sortAllocas(CfgVector<Inst *> &Allocas, InstList &Insts,
-                   bool IsKnownFrameOffset);
-  /// Merge all the fixed-size allocas in the entry block.
-  void processAllocas();
+
+  enum AllocaBaseVariableType {
+    BVT_StackPointer,
+    BVT_FramePointer,
+    BVT_UserPointer
+  };
+  void sortAndCombineAllocas(CfgVector<Inst *> &Allocas,
+                             uint32_t CombinedAlignment, InstList &Insts,
+                             AllocaBaseVariableType BaseVariableType);
+  /// Scan allocas to determine whether we need to use a frame pointer.
+  /// If SortAndCombine == true, merge all the fixed-size allocas in the
+  /// entry block and emit stack or frame pointer-relative addressing.
+  void processAllocas(bool SortAndCombine);
   void doAddressOpt();
   void doArgLowering();
   void doNopInsertion();
   void genCode();
   void genFrame();
   void computeLoopNestDepth();
   void livenessLightweight();
   void liveness(LivenessMode Mode);
   bool validateLiveness() const;
   void contractEmptyNodes();
@@ skipping 90 matching lines @@
 
 public:
   static void TlsInit() { ICE_TLS_INIT_FIELD(CurrentCfg); }
 };
 
 template <> Variable *Cfg::makeVariable<Variable>(Type Ty);
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICECFG_H