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Side by Side Diff: src/IceTargetLoweringX8632Traits.h

Issue 1411583007: Combine allocas (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix a typo. Created 5 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=// 1 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 717 matching lines...) Expand 10 before | Expand all | Expand 10 after
728 SegmentRegisters SegmentReg = DefaultSegment) { 728 SegmentRegisters SegmentReg = DefaultSegment) {
729 return new (Func->allocate<X86OperandMem>()) 729 return new (Func->allocate<X86OperandMem>())
730 X86OperandMem(Func, Ty, Base, Offset, Index, Shift, SegmentReg); 730 X86OperandMem(Func, Ty, Base, Offset, Index, Shift, SegmentReg);
731 } 731 }
732 Variable *getBase() const { return Base; } 732 Variable *getBase() const { return Base; }
733 Constant *getOffset() const { return Offset; } 733 Constant *getOffset() const { return Offset; }
734 Variable *getIndex() const { return Index; } 734 Variable *getIndex() const { return Index; }
735 uint16_t getShift() const { return Shift; } 735 uint16_t getShift() const { return Shift; }
736 SegmentRegisters getSegmentRegister() const { return SegmentReg; } 736 SegmentRegisters getSegmentRegister() const { return SegmentReg; }
737 void emitSegmentOverride(Assembler *Asm) const; 737 void emitSegmentOverride(Assembler *Asm) const;
738 Address toAsmAddress(Assembler *Asm) const; 738 Address toAsmAddress(Assembler *Asm, Ice::TargetLowering *Target) const;
Jim Stichnoth 2015/11/11 17:39:45 Maybe const ... *Target ?
sehr 2015/11/11 22:14:11 Done.
739 739
740 void emit(const Cfg *Func) const override; 740 void emit(const Cfg *Func) const override;
741 using X86Operand::dump; 741 using X86Operand::dump;
742 void dump(const Cfg *Func, Ostream &Str) const override; 742 void dump(const Cfg *Func, Ostream &Str) const override;
743 743
744 static bool classof(const Operand *Operand) { 744 static bool classof(const Operand *Operand) {
745 return Operand->getKind() == static_cast<OperandKind>(kMem); 745 return Operand->getKind() == static_cast<OperandKind>(kMem);
746 } 746 }
747 747
748 void setRandomized(bool R) { Randomized = R; } 748 void setRandomized(bool R) { Randomized = R; }
749 749
750 bool getRandomized() const { return Randomized; } 750 bool getRandomized() const { return Randomized; }
751 751
752 void setIgnoreStackAdjust(bool Ignore) { IgnoreStackAdjust = Ignore; }
Jim Stichnoth 2015/11/11 17:39:45 I think you should add this stuff to X8664, even t
sehr 2015/11/11 22:14:10 Done.
753 bool getIgnoreStackAdjust() const { return IgnoreStackAdjust; }
754
752 private: 755 private:
753 X86OperandMem(Cfg *Func, Type Ty, Variable *Base, Constant *Offset, 756 X86OperandMem(Cfg *Func, Type Ty, Variable *Base, Constant *Offset,
754 Variable *Index, uint16_t Shift, SegmentRegisters SegmentReg); 757 Variable *Index, uint16_t Shift, SegmentRegisters SegmentReg);
755 758
756 Variable *Base; 759 Variable *Base;
757 Constant *Offset; 760 Constant *Offset;
758 Variable *Index; 761 Variable *Index;
759 uint16_t Shift; 762 uint16_t Shift;
760 SegmentRegisters SegmentReg : 16; 763 SegmentRegisters SegmentReg : 16;
761 /// A flag to show if this memory operand is a randomized one. Randomized 764 /// A flag to show if this memory operand is a randomized one. Randomized
762 /// memory operands are generated in 765 /// memory operands are generated in
763 /// TargetX86Base::randomizeOrPoolImmediate() 766 /// TargetX86Base::randomizeOrPoolImmediate()
764 bool Randomized; 767 bool Randomized;
768 /// Memory operations involving the stack pointer need to know when the
769 /// stack pointer was moved temporarily. Ignore that adjustment in
770 /// cases that should be pinned to the stack pointer, such as outgoing
771 /// arguments to calls.
772 bool IgnoreStackAdjust = false;
765 }; 773 };
766 774
767 /// VariableSplit is a way to treat an f64 memory location as a pair of i32 775 /// VariableSplit is a way to treat an f64 memory location as a pair of i32
768 /// locations (Low and High). This is needed for some cases of the Bitcast 776 /// locations (Low and High). This is needed for some cases of the Bitcast
769 /// instruction. Since it's not possible for integer registers to access the 777 /// instruction. Since it's not possible for integer registers to access the
770 /// XMM registers and vice versa, the lowering forces the f64 to be spilled to 778 /// XMM registers and vice versa, the lowering forces the f64 to be spilled to
771 /// the stack and then accesses through the VariableSplit. 779 /// the stack and then accesses through the VariableSplit.
772 // TODO(jpp): remove references to VariableSplit from IceInstX86Base as 64bit 780 // TODO(jpp): remove references to VariableSplit from IceInstX86Base as 64bit
773 // targets can natively handle these. 781 // targets can natively handle these.
774 class VariableSplit : public X86Operand { 782 class VariableSplit : public X86Operand {
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862 870
863 } // end of namespace X86Internal 871 } // end of namespace X86Internal
864 872
865 namespace X8632 { 873 namespace X8632 {
866 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8632>; 874 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8632>;
867 } // end of namespace X8632 875 } // end of namespace X8632
868 876
869 } // end of namespace Ice 877 } // end of namespace Ice
870 878
871 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H 879 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H
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