Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(275)

Side by Side Diff: src/IceInstX8632.cpp

Issue 1411583007: Combine allocas (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix a typo. Created 5 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 83 matching lines...) Expand 10 before | Expand all | Expand 10 after
94 Vars[I++] = Base; 94 Vars[I++] = Base;
95 if (Index) 95 if (Index)
96 Vars[I++] = Index; 96 Vars[I++] = Index;
97 assert(I == NumVars); 97 assert(I == NumVars);
98 } 98 }
99 } 99 }
100 100
101 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const { 101 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const {
102 if (!BuildDefs::dump()) 102 if (!BuildDefs::dump())
103 return; 103 return;
104 const ::Ice::TargetLowering *Target = Func->getTarget();
105 // If the base is rematerializable, we need to replace it with the correct
106 // physical register (esp or ebp), and update the Offset.
107 int32_t Disp = 0;
108 if (Base && Base->isRematerializable()) {
109 Disp += Base->getStackOffset();
110 if (!getIgnoreStackAdjust())
111 Disp += Target->getStackAdjustment();
112 }
113 // The index should never be rematerializable. But if we ever allow it, then
114 // we should make sure the rematerialization offset is shifted by the Shift
115 // value.
116 if (Index)
117 assert(!Index->isRematerializable());
104 Ostream &Str = Func->getContext()->getStrEmit(); 118 Ostream &Str = Func->getContext()->getStrEmit();
105 if (SegmentReg != DefaultSegment) { 119 if (SegmentReg != DefaultSegment) {
106 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); 120 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
107 Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; 121 Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":";
108 } 122 }
109 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading 123 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading
110 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. 124 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr.
111 if (!Offset) { 125 if (!Offset && Disp == 0) {
Jim Stichnoth 2015/11/11 17:39:44 Offset == 0
sehr 2015/11/11 22:14:10 Done.
112 // No offset, emit nothing. 126 // No offset, emit nothing.
127 } else if (!Offset && Disp != 0) {
Jim Stichnoth 2015/11/11 17:39:44 Offset != 0
sehr 2015/11/11 22:14:10 I think you mean Offset == 0. Done, if so.
128 Str << Disp;
113 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { 129 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) {
114 if (Base == nullptr || CI->getValue()) 130 if (Base == nullptr || CI->getValue() || Disp)
Jim Stichnoth 2015/11/11 17:39:44 Disp != 0
sehr 2015/11/11 22:14:10 Done.
115 // Emit a non-zero offset without a leading '$'. 131 // Emit a non-zero offset without a leading '$'.
116 Str << CI->getValue(); 132 Str << CI->getValue() + Disp;
117 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { 133 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) {
134 // TODO(sehr): this still needs updating for Disp.
135 assert(Disp == 0);
118 CR->emitWithoutPrefix(Func->getTarget()); 136 CR->emitWithoutPrefix(Func->getTarget());
119 } else { 137 } else {
120 llvm_unreachable("Invalid offset type for x86 mem operand"); 138 llvm_unreachable("Invalid offset type for x86 mem operand");
121 } 139 }
122 140
123 if (Base || Index) { 141 if (Base || Index) {
124 Str << "("; 142 Str << "(";
125 if (Base) 143 if (Base)
126 Base->emit(Func); 144 Base->emit(Func);
127 if (Index) { 145 if (Index) {
128 Str << ","; 146 Str << ",";
129 Index->emit(Func); 147 Index->emit(Func);
130 if (Shift) 148 if (Shift)
131 Str << "," << (1u << Shift); 149 Str << "," << (1u << Shift);
132 } 150 }
133 Str << ")"; 151 Str << ")";
134 } 152 }
135 } 153 }
136 154
137 void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func, 155 void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func,
138 Ostream &Str) const { 156 Ostream &Str) const {
139 if (!BuildDefs::dump()) 157 if (!BuildDefs::dump())
140 return; 158 return;
141 if (SegmentReg != DefaultSegment) { 159 if (SegmentReg != DefaultSegment) {
142 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); 160 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
143 Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; 161 Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":";
144 } 162 }
145 bool Dumped = false; 163 bool Dumped = false;
146 Str << "["; 164 Str << "[";
165 int32_t Disp = 0;
166 if (Base && Base->isRematerializable()) {
167 Disp += Base->getStackOffset();
168 if (!getIgnoreStackAdjust())
169 Disp += Func->getTarget()->getStackAdjustment();
170 }
147 if (Base) { 171 if (Base) {
148 if (Func) 172 if (Func)
149 Base->dump(Func); 173 Base->dump(Func);
150 else 174 else
151 Base->dump(Str); 175 Base->dump(Str);
152 Dumped = true; 176 Dumped = true;
153 } 177 }
154 if (Index) { 178 if (Index) {
179 assert(!Index->isRematerializable());
155 if (Base) 180 if (Base)
156 Str << "+"; 181 Str << "+";
157 if (Shift > 0) 182 if (Shift > 0)
158 Str << (1u << Shift) << "*"; 183 Str << (1u << Shift) << "*";
159 if (Func) 184 if (Func)
160 Index->dump(Func); 185 Index->dump(Func);
161 else 186 else
162 Index->dump(Str); 187 Index->dump(Str);
163 Dumped = true; 188 Dumped = true;
164 } 189 }
165 // Pretty-print the Offset. 190 // Pretty-print the Offset.
166 bool OffsetIsZero = false; 191 bool OffsetIsZero = false;
167 bool OffsetIsNegative = false; 192 bool OffsetIsNegative = false;
168 if (!Offset) { 193 if (!Offset && Disp == 0) {
Jim Stichnoth 2015/11/11 17:39:44 The same Offset==0 etc. as above.
sehr 2015/11/11 22:14:10 Done.
169 OffsetIsZero = true; 194 OffsetIsZero = true;
195 } else if (!Offset && Disp != 0) {
196 OffsetIsZero = (Disp == 0);
197 OffsetIsNegative = (Disp < 0);
170 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { 198 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) {
171 OffsetIsZero = (CI->getValue() == 0); 199 OffsetIsZero = (CI->getValue() + Disp == 0);
172 OffsetIsNegative = (static_cast<int32_t>(CI->getValue()) < 0); 200 OffsetIsNegative = (static_cast<int32_t>(CI->getValue()) + Disp < 0);
173 } else { 201 } else {
174 assert(llvm::isa<ConstantRelocatable>(Offset)); 202 assert(llvm::isa<ConstantRelocatable>(Offset) && Disp == 0);
175 } 203 }
176 if (Dumped) { 204 if (Dumped) {
177 if (!OffsetIsZero) { // Suppress if Offset is known to be 0 205 if (!OffsetIsZero) { // Suppress if Offset is known to be 0
178 if (!OffsetIsNegative) // Suppress if Offset is known to be negative 206 if (!OffsetIsNegative) // Suppress if Offset is known to be negative
179 Str << "+"; 207 Str << "+";
180 Offset->dump(Func, Str); 208 Offset->dump(Func, Str);
181 } 209 }
182 } else { 210 } else {
183 // There is only the offset. 211 // There is only the offset.
184 Offset->dump(Func, Str); 212 Offset->dump(Func, Str);
185 } 213 }
186 Str << "]"; 214 Str << "]";
187 } 215 }
188 216
189 void MachineTraits<TargetX8632>::X86OperandMem::emitSegmentOverride( 217 void MachineTraits<TargetX8632>::X86OperandMem::emitSegmentOverride(
190 MachineTraits<TargetX8632>::Assembler *Asm) const { 218 MachineTraits<TargetX8632>::Assembler *Asm) const {
191 if (SegmentReg != DefaultSegment) { 219 if (SegmentReg != DefaultSegment) {
192 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); 220 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
193 Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); 221 Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]);
194 } 222 }
195 } 223 }
196 224
197 MachineTraits<TargetX8632>::Address 225 MachineTraits<TargetX8632>::Address
198 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress( 226 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress(
199 MachineTraits<TargetX8632>::Assembler *Asm) const { 227 MachineTraits<TargetX8632>::Assembler *Asm,
228 Ice::TargetLowering *Target) const {
200 int32_t Disp = 0; 229 int32_t Disp = 0;
230 if (getBase() && getBase()->isRematerializable()) {
231 Disp += getBase()->getStackOffset();
232 if (!getIgnoreStackAdjust()) {
233 Disp += Target->getStackAdjustment();
234 }
235 }
236 if (getIndex())
Jim Stichnoth 2015/11/11 17:39:44 Add the same comment as in emit() ?
sehr 2015/11/11 22:14:10 Done.
237 assert(!getIndex()->isRematerializable());
201 AssemblerFixup *Fixup = nullptr; 238 AssemblerFixup *Fixup = nullptr;
202 // Determine the offset (is it relocatable?) 239 // Determine the offset (is it relocatable?)
203 if (getOffset()) { 240 if (getOffset()) {
204 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { 241 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
205 Disp = static_cast<int32_t>(CI->getValue()); 242 Disp += static_cast<int32_t>(CI->getValue());
206 } else if (const auto CR = 243 } else if (const auto CR =
207 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { 244 llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
208 Disp = CR->getOffset(); 245 Disp += CR->getOffset();
209 Fixup = Asm->createFixup(RelFixup, CR); 246 Fixup = Asm->createFixup(RelFixup, CR);
210 } else { 247 } else {
211 llvm_unreachable("Unexpected offset type"); 248 llvm_unreachable("Unexpected offset type");
212 } 249 }
213 } 250 }
214 251
215 // Now convert to the various possible forms. 252 // Now convert to the various possible forms.
216 if (getBase() && getIndex()) { 253 if (getBase() && getIndex()) {
217 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), 254 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
218 getEncodedGPR(getIndex()->getRegNum()), 255 getEncodedGPR(getIndex()->getRegNum()),
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
272 Var->dump(Func); 309 Var->dump(Func);
273 else 310 else
274 Var->dump(Str); 311 Var->dump(Str);
275 Str << ")"; 312 Str << ")";
276 } 313 }
277 314
278 } // namespace X86Internal 315 } // namespace X86Internal
279 } // end of namespace Ice 316 } // end of namespace Ice
280 317
281 X86INSTS_DEFINE_STATIC_DATA(TargetX8632) 318 X86INSTS_DEFINE_STATIC_DATA(TargetX8632)
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698