ARM: Enable VFP default NaN mode

src/arm/stub-cache-arm.cc

Index: src/arm/stub-cache-arm.cc
diff --git a/src/arm/stub-cache-arm.cc b/src/arm/stub-cache-arm.cc
index 24a83bb3d6640592072f8b24b2b30669e265e913..f22acb4709e386d75a2a4df18f981624449de2fa 100644
--- a/src/arm/stub-cache-arm.cc
+++ b/src/arm/stub-cache-arm.cc
@@ -1621,7 +1621,7 @@ Handle<Code> CallStubCompiler::CompileArrayPushCall(
 
       __ ldr(r4, MemOperand(sp, (argc - 1) * kPointerSize));
       __ StoreNumberToDoubleElements(
-          r4, r0, elements, r3, r5, r2, r9,
+          r4, r0, elements, r5, r2, r3, r9,

[ulan, 2013/04/15 07:43:01]

Why do we need this shuffling of scratch registers here and in other places?

           &call_builtin, argc * kDoubleSize);
 
       // Save new length.
@@ -3586,9 +3586,9 @@ void KeyedStoreStubCompiler::GenerateStoreFastDoubleElement(
                                  // All registers after this are overwritten.
                                  elements_reg,
                                  scratch1,
-                                 scratch2,
                                  scratch3,
                                  scratch4,
+                                 scratch2,
                                  &transition_elements_kind);
   __ Ret();