OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #if V8_TARGET_ARCH_X64 | 5 #if V8_TARGET_ARCH_X64 |
6 | 6 |
7 #include "src/base/bits.h" | 7 #include "src/base/bits.h" |
8 #include "src/base/division-by-constant.h" | 8 #include "src/base/division-by-constant.h" |
9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
(...skipping 2395 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2406 void MacroAssembler::Move(XMMRegister dst, uint32_t src) { | 2406 void MacroAssembler::Move(XMMRegister dst, uint32_t src) { |
2407 if (src == 0) { | 2407 if (src == 0) { |
2408 xorps(dst, dst); | 2408 xorps(dst, dst); |
2409 } else { | 2409 } else { |
2410 unsigned pop = base::bits::CountPopulation32(src); | 2410 unsigned pop = base::bits::CountPopulation32(src); |
2411 DCHECK_NE(0u, pop); | 2411 DCHECK_NE(0u, pop); |
2412 if (pop == 32) { | 2412 if (pop == 32) { |
2413 pcmpeqd(dst, dst); | 2413 pcmpeqd(dst, dst); |
2414 } else { | 2414 } else { |
2415 movl(kScratchRegister, Immediate(src)); | 2415 movl(kScratchRegister, Immediate(src)); |
2416 movq(dst, kScratchRegister); | 2416 Movq(dst, kScratchRegister); |
2417 } | 2417 } |
2418 } | 2418 } |
2419 } | 2419 } |
2420 | 2420 |
2421 | 2421 |
2422 void MacroAssembler::Move(XMMRegister dst, uint64_t src) { | 2422 void MacroAssembler::Move(XMMRegister dst, uint64_t src) { |
2423 if (src == 0) { | 2423 if (src == 0) { |
2424 xorps(dst, dst); | 2424 xorps(dst, dst); |
2425 } else { | 2425 } else { |
2426 unsigned nlz = base::bits::CountLeadingZeros64(src); | 2426 unsigned nlz = base::bits::CountLeadingZeros64(src); |
2427 unsigned ntz = base::bits::CountTrailingZeros64(src); | 2427 unsigned ntz = base::bits::CountTrailingZeros64(src); |
2428 unsigned pop = base::bits::CountPopulation64(src); | 2428 unsigned pop = base::bits::CountPopulation64(src); |
2429 DCHECK_NE(0u, pop); | 2429 DCHECK_NE(0u, pop); |
2430 if (pop == 64) { | 2430 if (pop == 64) { |
2431 pcmpeqd(dst, dst); | 2431 pcmpeqd(dst, dst); |
2432 } else if (pop + ntz == 64) { | 2432 } else if (pop + ntz == 64) { |
2433 pcmpeqd(dst, dst); | 2433 pcmpeqd(dst, dst); |
2434 psllq(dst, ntz); | 2434 psllq(dst, ntz); |
2435 } else if (pop + nlz == 64) { | 2435 } else if (pop + nlz == 64) { |
2436 pcmpeqd(dst, dst); | 2436 pcmpeqd(dst, dst); |
2437 psrlq(dst, nlz); | 2437 psrlq(dst, nlz); |
2438 } else { | 2438 } else { |
2439 uint32_t lower = static_cast<uint32_t>(src); | 2439 uint32_t lower = static_cast<uint32_t>(src); |
2440 uint32_t upper = static_cast<uint32_t>(src >> 32); | 2440 uint32_t upper = static_cast<uint32_t>(src >> 32); |
2441 if (upper == 0) { | 2441 if (upper == 0) { |
2442 Move(dst, lower); | 2442 Move(dst, lower); |
2443 } else { | 2443 } else { |
2444 movq(kScratchRegister, src); | 2444 movq(kScratchRegister, src); |
2445 movq(dst, kScratchRegister); | 2445 Movq(dst, kScratchRegister); |
2446 } | 2446 } |
2447 } | 2447 } |
2448 } | 2448 } |
2449 } | 2449 } |
2450 | 2450 |
2451 | 2451 |
2452 void MacroAssembler::Movapd(XMMRegister dst, XMMRegister src) { | 2452 void MacroAssembler::Movapd(XMMRegister dst, XMMRegister src) { |
2453 if (CpuFeatures::IsSupported(AVX)) { | 2453 if (CpuFeatures::IsSupported(AVX)) { |
2454 CpuFeatureScope scope(this, AVX); | 2454 CpuFeatureScope scope(this, AVX); |
2455 vmovapd(dst, src); | 2455 vmovapd(dst, src); |
(...skipping 26 matching lines...) Expand all Loading... |
2482 void MacroAssembler::Movsd(const Operand& dst, XMMRegister src) { | 2482 void MacroAssembler::Movsd(const Operand& dst, XMMRegister src) { |
2483 if (CpuFeatures::IsSupported(AVX)) { | 2483 if (CpuFeatures::IsSupported(AVX)) { |
2484 CpuFeatureScope scope(this, AVX); | 2484 CpuFeatureScope scope(this, AVX); |
2485 vmovsd(dst, src); | 2485 vmovsd(dst, src); |
2486 } else { | 2486 } else { |
2487 movsd(dst, src); | 2487 movsd(dst, src); |
2488 } | 2488 } |
2489 } | 2489 } |
2490 | 2490 |
2491 | 2491 |
| 2492 void MacroAssembler::Movd(XMMRegister dst, Register src) { |
| 2493 if (CpuFeatures::IsSupported(AVX)) { |
| 2494 CpuFeatureScope scope(this, AVX); |
| 2495 vmovd(dst, src); |
| 2496 } else { |
| 2497 movd(dst, src); |
| 2498 } |
| 2499 } |
| 2500 |
| 2501 |
| 2502 void MacroAssembler::Movd(XMMRegister dst, const Operand& src) { |
| 2503 if (CpuFeatures::IsSupported(AVX)) { |
| 2504 CpuFeatureScope scope(this, AVX); |
| 2505 vmovd(dst, src); |
| 2506 } else { |
| 2507 movd(dst, src); |
| 2508 } |
| 2509 } |
| 2510 |
| 2511 |
| 2512 void MacroAssembler::Movd(Register dst, XMMRegister src) { |
| 2513 if (CpuFeatures::IsSupported(AVX)) { |
| 2514 CpuFeatureScope scope(this, AVX); |
| 2515 vmovd(dst, src); |
| 2516 } else { |
| 2517 movd(dst, src); |
| 2518 } |
| 2519 } |
| 2520 |
| 2521 |
| 2522 void MacroAssembler::Movq(XMMRegister dst, Register src) { |
| 2523 if (CpuFeatures::IsSupported(AVX)) { |
| 2524 CpuFeatureScope scope(this, AVX); |
| 2525 vmovq(dst, src); |
| 2526 } else { |
| 2527 movq(dst, src); |
| 2528 } |
| 2529 } |
| 2530 |
| 2531 |
| 2532 void MacroAssembler::Movq(Register dst, XMMRegister src) { |
| 2533 if (CpuFeatures::IsSupported(AVX)) { |
| 2534 CpuFeatureScope scope(this, AVX); |
| 2535 vmovq(dst, src); |
| 2536 } else { |
| 2537 movq(dst, src); |
| 2538 } |
| 2539 } |
| 2540 |
| 2541 |
2492 void MacroAssembler::Cmp(Register dst, Handle<Object> source) { | 2542 void MacroAssembler::Cmp(Register dst, Handle<Object> source) { |
2493 AllowDeferredHandleDereference smi_check; | 2543 AllowDeferredHandleDereference smi_check; |
2494 if (source->IsSmi()) { | 2544 if (source->IsSmi()) { |
2495 Cmp(dst, Smi::cast(*source)); | 2545 Cmp(dst, Smi::cast(*source)); |
2496 } else { | 2546 } else { |
2497 MoveHeapObject(kScratchRegister, source); | 2547 MoveHeapObject(kScratchRegister, source); |
2498 cmpp(dst, kScratchRegister); | 2548 cmpp(dst, kScratchRegister); |
2499 } | 2549 } |
2500 } | 2550 } |
2501 | 2551 |
(...skipping 288 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2790 rmode == RelocInfo::CODE_AGE_SEQUENCE); | 2840 rmode == RelocInfo::CODE_AGE_SEQUENCE); |
2791 call(code_object, rmode, ast_id); | 2841 call(code_object, rmode, ast_id); |
2792 #ifdef DEBUG | 2842 #ifdef DEBUG |
2793 CHECK_EQ(end_position, pc_offset()); | 2843 CHECK_EQ(end_position, pc_offset()); |
2794 #endif | 2844 #endif |
2795 } | 2845 } |
2796 | 2846 |
2797 | 2847 |
2798 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { | 2848 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { |
2799 if (imm8 == 0) { | 2849 if (imm8 == 0) { |
2800 movd(dst, src); | 2850 Movd(dst, src); |
2801 return; | 2851 return; |
2802 } | 2852 } |
2803 DCHECK_EQ(1, imm8); | 2853 DCHECK_EQ(1, imm8); |
2804 if (CpuFeatures::IsSupported(SSE4_1)) { | 2854 if (CpuFeatures::IsSupported(SSE4_1)) { |
2805 CpuFeatureScope sse_scope(this, SSE4_1); | 2855 CpuFeatureScope sse_scope(this, SSE4_1); |
2806 pextrd(dst, src, imm8); | 2856 pextrd(dst, src, imm8); |
2807 return; | 2857 return; |
2808 } | 2858 } |
2809 movq(dst, src); | 2859 movq(dst, src); |
2810 shrq(dst, Immediate(32)); | 2860 shrq(dst, Immediate(32)); |
2811 } | 2861 } |
2812 | 2862 |
2813 | 2863 |
2814 void MacroAssembler::Pinsrd(XMMRegister dst, Register src, int8_t imm8) { | 2864 void MacroAssembler::Pinsrd(XMMRegister dst, Register src, int8_t imm8) { |
2815 if (CpuFeatures::IsSupported(SSE4_1)) { | 2865 if (CpuFeatures::IsSupported(SSE4_1)) { |
2816 CpuFeatureScope sse_scope(this, SSE4_1); | 2866 CpuFeatureScope sse_scope(this, SSE4_1); |
2817 pinsrd(dst, src, imm8); | 2867 pinsrd(dst, src, imm8); |
2818 return; | 2868 return; |
2819 } | 2869 } |
2820 movd(xmm0, src); | 2870 Movd(xmm0, src); |
2821 if (imm8 == 1) { | 2871 if (imm8 == 1) { |
2822 punpckldq(dst, xmm0); | 2872 punpckldq(dst, xmm0); |
2823 } else { | 2873 } else { |
2824 DCHECK_EQ(0, imm8); | 2874 DCHECK_EQ(0, imm8); |
2825 psrlq(dst, 32); | 2875 psrlq(dst, 32); |
2826 punpckldq(xmm0, dst); | 2876 punpckldq(xmm0, dst); |
2827 movaps(dst, xmm0); | 2877 movaps(dst, xmm0); |
2828 } | 2878 } |
2829 } | 2879 } |
2830 | 2880 |
2831 | 2881 |
2832 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { | 2882 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { |
2833 DCHECK(imm8 == 0 || imm8 == 1); | 2883 DCHECK(imm8 == 0 || imm8 == 1); |
2834 if (CpuFeatures::IsSupported(SSE4_1)) { | 2884 if (CpuFeatures::IsSupported(SSE4_1)) { |
2835 CpuFeatureScope sse_scope(this, SSE4_1); | 2885 CpuFeatureScope sse_scope(this, SSE4_1); |
2836 pinsrd(dst, src, imm8); | 2886 pinsrd(dst, src, imm8); |
2837 return; | 2887 return; |
2838 } | 2888 } |
2839 movd(xmm0, src); | 2889 Movd(xmm0, src); |
2840 if (imm8 == 1) { | 2890 if (imm8 == 1) { |
2841 punpckldq(dst, xmm0); | 2891 punpckldq(dst, xmm0); |
2842 } else { | 2892 } else { |
2843 DCHECK_EQ(0, imm8); | 2893 DCHECK_EQ(0, imm8); |
2844 psrlq(dst, 32); | 2894 psrlq(dst, 32); |
2845 punpckldq(xmm0, dst); | 2895 punpckldq(xmm0, dst); |
2846 movaps(dst, xmm0); | 2896 movaps(dst, xmm0); |
2847 } | 2897 } |
2848 } | 2898 } |
2849 | 2899 |
(...skipping 2231 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
5081 movl(rax, dividend); | 5131 movl(rax, dividend); |
5082 shrl(rax, Immediate(31)); | 5132 shrl(rax, Immediate(31)); |
5083 addl(rdx, rax); | 5133 addl(rdx, rax); |
5084 } | 5134 } |
5085 | 5135 |
5086 | 5136 |
5087 } // namespace internal | 5137 } // namespace internal |
5088 } // namespace v8 | 5138 } // namespace v8 |
5089 | 5139 |
5090 #endif // V8_TARGET_ARCH_X64 | 5140 #endif // V8_TARGET_ARCH_X64 |
OLD | NEW |