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Side by Side Diff: src/IceRegAlloc.cpp

Issue 1409863006: Subzero. ARM32. Refactors atomic intrinsics lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 10 months ago
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1 //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===// 1 //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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635 ++RegUses[RegAlias]; 635 ++RegUses[RegAlias];
636 } 636 }
637 Active.push_back(Iter.Cur); 637 Active.push_back(Iter.Cur);
638 } 638 }
639 639
640 void LinearScan::allocateFreeRegister(IterationState &Iter, bool Filtered) { 640 void LinearScan::allocateFreeRegister(IterationState &Iter, bool Filtered) {
641 const RegNumT RegNum = 641 const RegNumT RegNum =
642 *RegNumBVIter(Filtered ? Iter.Free : Iter.FreeUnfiltered).begin(); 642 *RegNumBVIter(Filtered ? Iter.Free : Iter.FreeUnfiltered).begin();
643 Iter.Cur->setRegNumTmp(RegNum); 643 Iter.Cur->setRegNumTmp(RegNum);
644 if (Filtered) 644 if (Filtered)
645 dumpLiveRangeTrace("Allocating ", Iter.Cur); 645 dumpLiveRangeTrace("Allocating Y ", Iter.Cur);
646 else 646 else
647 dumpLiveRangeTrace("Allocating X ", Iter.Cur); 647 dumpLiveRangeTrace("Allocating X ", Iter.Cur);
648 const llvm::SmallBitVector &Aliases = *RegAliases[RegNum]; 648 const llvm::SmallBitVector &Aliases = *RegAliases[RegNum];
649 for (RegNumT RegAlias : RegNumBVIter(Aliases)) { 649 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
650 assert(RegUses[RegAlias] >= 0); 650 assert(RegUses[RegAlias] >= 0);
651 ++RegUses[RegAlias]; 651 ++RegUses[RegAlias];
652 } 652 }
653 Active.push_back(Iter.Cur); 653 Active.push_back(Iter.Cur);
654 } 654 }
655 655
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761 Evicted.push_back(Item); 761 Evicted.push_back(Item);
762 } 762 }
763 } 763 }
764 // Assign the register to Cur. 764 // Assign the register to Cur.
765 Iter.Cur->setRegNumTmp(RegNumT::fromInt(MinWeightIndex)); 765 Iter.Cur->setRegNumTmp(RegNumT::fromInt(MinWeightIndex));
766 for (RegNumT RegAlias : RegNumBVIter(Aliases)) { 766 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
767 assert(RegUses[RegAlias] >= 0); 767 assert(RegUses[RegAlias] >= 0);
768 ++RegUses[RegAlias]; 768 ++RegUses[RegAlias];
769 } 769 }
770 Active.push_back(Iter.Cur); 770 Active.push_back(Iter.Cur);
771 dumpLiveRangeTrace("Allocating ", Iter.Cur); 771 dumpLiveRangeTrace("Allocating Z ", Iter.Cur);
772 } 772 }
773 773
774 void LinearScan::assignFinalRegisters( 774 void LinearScan::assignFinalRegisters(
775 const llvm::SmallBitVector &RegMaskFull, 775 const llvm::SmallBitVector &RegMaskFull,
776 const llvm::SmallBitVector &PreDefinedRegisters, bool Randomized) { 776 const llvm::SmallBitVector &PreDefinedRegisters, bool Randomized) {
777 const size_t NumRegisters = RegMaskFull.size(); 777 const size_t NumRegisters = RegMaskFull.size();
778 llvm::SmallVector<RegNumT, REGS_SIZE> Permutation(NumRegisters); 778 llvm::SmallVector<RegNumT, REGS_SIZE> Permutation(NumRegisters);
779 if (Randomized) { 779 if (Randomized) {
780 // Create a random number generator for regalloc randomization. Merge 780 // Create a random number generator for regalloc randomization. Merge
781 // function's sequence and Kind value as the Salt. Because regAlloc() is 781 // function's sequence and Kind value as the Salt. Because regAlloc() is
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1011 Str << "\n"; 1011 Str << "\n";
1012 } 1012 }
1013 Str << "++++++ Inactive:\n"; 1013 Str << "++++++ Inactive:\n";
1014 for (const Variable *Item : Inactive) { 1014 for (const Variable *Item : Inactive) {
1015 dumpLiveRange(Item, Func); 1015 dumpLiveRange(Item, Func);
1016 Str << "\n"; 1016 Str << "\n";
1017 } 1017 }
1018 } 1018 }
1019 1019
1020 } // end of namespace Ice 1020 } // end of namespace Ice
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