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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #if V8_TARGET_ARCH_PPC | 9 #if V8_TARGET_ARCH_PPC |
10 | 10 |
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2672 void Simulator::ExecuteExt2(Instruction* instr) { | 2672 void Simulator::ExecuteExt2(Instruction* instr) { |
2673 // Check first the 10-1 bit versions | 2673 // Check first the 10-1 bit versions |
2674 if (ExecuteExt2_10bit(instr)) return; | 2674 if (ExecuteExt2_10bit(instr)) return; |
2675 // Now look at the lesser encodings | 2675 // Now look at the lesser encodings |
2676 if (ExecuteExt2_9bit_part1(instr)) return; | 2676 if (ExecuteExt2_9bit_part1(instr)) return; |
2677 if (ExecuteExt2_9bit_part2(instr)) return; | 2677 if (ExecuteExt2_9bit_part2(instr)) return; |
2678 ExecuteExt2_5bit(instr); | 2678 ExecuteExt2_5bit(instr); |
2679 } | 2679 } |
2680 | 2680 |
2681 | 2681 |
| 2682 void Simulator::ExecuteExt3(Instruction* instr) { |
| 2683 int opcode = instr->Bits(10, 1) << 1; |
| 2684 switch (opcode) { |
| 2685 case FCFID: { |
| 2686 // fcfids |
| 2687 int frt = instr->RTValue(); |
| 2688 int frb = instr->RBValue(); |
| 2689 double t_val = get_double_from_d_register(frb); |
| 2690 int64_t* frb_val_p = reinterpret_cast<int64_t*>(&t_val); |
| 2691 double frt_val = static_cast<float>(*frb_val_p); |
| 2692 set_d_register_from_double(frt, frt_val); |
| 2693 return; |
| 2694 } |
| 2695 } |
| 2696 UNIMPLEMENTED(); // Not used by V8. |
| 2697 } |
| 2698 |
| 2699 |
2682 void Simulator::ExecuteExt4(Instruction* instr) { | 2700 void Simulator::ExecuteExt4(Instruction* instr) { |
2683 switch (instr->Bits(5, 1) << 1) { | 2701 switch (instr->Bits(5, 1) << 1) { |
2684 case FDIV: { | 2702 case FDIV: { |
2685 int frt = instr->RTValue(); | 2703 int frt = instr->RTValue(); |
2686 int fra = instr->RAValue(); | 2704 int fra = instr->RAValue(); |
2687 int frb = instr->RBValue(); | 2705 int frb = instr->RBValue(); |
2688 double fra_val = get_double_from_d_register(fra); | 2706 double fra_val = get_double_from_d_register(fra); |
2689 double frb_val = get_double_from_d_register(frb); | 2707 double frb_val = get_double_from_d_register(frb); |
2690 double frt_val = fra_val / frb_val; | 2708 double frt_val = fra_val / frb_val; |
2691 set_d_register_from_double(frt, frt_val); | 2709 set_d_register_from_double(frt, frt_val); |
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3587 intptr_t ra_val = ra == 0 ? 0 : get_register(ra); | 3605 intptr_t ra_val = ra == 0 ? 0 : get_register(ra); |
3588 int64_t frs_val = get_d_register(frs); | 3606 int64_t frs_val = get_d_register(frs); |
3589 WriteDW(ra_val + offset, frs_val); | 3607 WriteDW(ra_val + offset, frs_val); |
3590 if (opcode == STFDU) { | 3608 if (opcode == STFDU) { |
3591 DCHECK(ra != 0); | 3609 DCHECK(ra != 0); |
3592 set_register(ra, ra_val + offset); | 3610 set_register(ra, ra_val + offset); |
3593 } | 3611 } |
3594 break; | 3612 break; |
3595 } | 3613 } |
3596 | 3614 |
3597 case EXT3: | 3615 case EXT3: { |
3598 UNIMPLEMENTED(); | 3616 ExecuteExt3(instr); |
| 3617 break; |
| 3618 } |
3599 case EXT4: { | 3619 case EXT4: { |
3600 ExecuteExt4(instr); | 3620 ExecuteExt4(instr); |
3601 break; | 3621 break; |
3602 } | 3622 } |
3603 | 3623 |
3604 #if V8_TARGET_ARCH_PPC64 | 3624 #if V8_TARGET_ARCH_PPC64 |
3605 case EXT5: { | 3625 case EXT5: { |
3606 ExecuteExt5(instr); | 3626 ExecuteExt5(instr); |
3607 break; | 3627 break; |
3608 } | 3628 } |
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3909 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); | 3929 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); |
3910 uintptr_t address = *stack_slot; | 3930 uintptr_t address = *stack_slot; |
3911 set_register(sp, current_sp + sizeof(uintptr_t)); | 3931 set_register(sp, current_sp + sizeof(uintptr_t)); |
3912 return address; | 3932 return address; |
3913 } | 3933 } |
3914 } // namespace internal | 3934 } // namespace internal |
3915 } // namespace v8 | 3935 } // namespace v8 |
3916 | 3936 |
3917 #endif // USE_SIMULATOR | 3937 #endif // USE_SIMULATOR |
3918 #endif // V8_TARGET_ARCH_PPC | 3938 #endif // V8_TARGET_ARCH_PPC |
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