[turbofan] Setup frames as needed.

src/compiler/register-allocator.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/register-allocator.h"
 #include "src/string-stream.h"
 
 namespace v8 {
@@ skipping 694 matching lines @@
 
 
 void TopLevelLiveRange::SpillAtDefinition(Zone* zone, int gap_index,
                                           InstructionOperand* operand) {
   DCHECK(HasNoSpillType());
   spills_at_definition_ = new (zone)
       SpillAtDefinitionList(gap_index, operand, spills_at_definition_);
 }
 
 
-bool TopLevelLiveRange::TryCommitSpillInDeferredBlock(
-    InstructionSequence* code, const InstructionOperand& spill_operand) {
+void TopLevelLiveRange::MarkSpilledInDeferredBlock(
+    const InstructionSequence* code) {
   if (!FLAG_turbo_preprocess_ranges || IsEmpty() || HasNoSpillType() ||
-      spill_operand.IsConstant() || spill_operand.IsImmediate()) {
-    return false;
+      !HasSpillRange()) {
+    return;
   }
 
   int count = 0;
   for (const LiveRange* child = this; child != nullptr; child = child->next()) {
     int first_instr = child->Start().ToInstructionIndex();
 
     // If the range starts at instruction end, the first instruction index is
     // the next one.
     if (!child->Start().IsGapPosition() && !child->Start().IsStart()) {
       ++first_instr;
     }
 
     // We only look at where the range starts. It doesn't matter where it ends:
     // if it ends past this block, then either there is a phi there already,
     // or ResolveControlFlow will adapt the last instruction gap of this block
     // as if there were a phi. In either case, data flow will be correct.
     const InstructionBlock* block = code->GetInstructionBlock(first_instr);
 
     // If we have slot uses in a subrange, bail out, because we need the value
     // on the stack before that use.
     bool has_slot_use = child->NextSlotPosition(child->Start()) != nullptr;
     if (!block->IsDeferred()) {
       if (child->spilled() || has_slot_use) {
         TRACE(
             "Live Range %d must be spilled at definition: found a "
             "slot-requiring non-deferred child range %d.\n",
             TopLevel()->vreg(), child->relative_id());
-        return false;
+        return;
       }
     } else {
       if (child->spilled() || has_slot_use) ++count;
     }
   }
-  if (count == 0) return false;
+  if (count == 0) return;
 
   spill_start_index_ = -1;
   spilled_in_deferred_blocks_ = true;
+  spills_at_definition_ = nullptr;
+}
+
+
+bool TopLevelLiveRange::TryCommitSpillInDeferredBlock(
+    InstructionSequence* code, const InstructionOperand& spill_operand) {
+  if (!IsSpilledOnlyInDeferredBlocks()) return false;
 
   TRACE("Live Range %d will be spilled only in deferred blocks.\n", vreg());
   // If we have ranges that aren't spilled but require the operand on the stack,
   // make sure we insert the spill.
   for (const LiveRange* child = this; child != nullptr; child = child->next()) {
     if (!child->spilled() &&
         child->NextSlotPosition(child->Start()) != nullptr) {
       auto instr = code->InstructionAt(child->Start().ToInstructionIndex());
       // Insert spill at the end to let live range connections happen at START.
       auto move =
@@ skipping 2188 matching lines @@
 SpillSlotLocator::SpillSlotLocator(RegisterAllocationData* data)
     : data_(data) {}
 
 
 void SpillSlotLocator::LocateSpillSlots() {
   auto code = data()->code();
   for (TopLevelLiveRange* range : data()->live_ranges()) {
     if (range == nullptr || range->IsEmpty()) continue;
     // We care only about ranges which spill in the frame.
     if (!range->HasSpillRange()) continue;
-    auto spills = range->spills_at_definition();
-    DCHECK_NOT_NULL(spills);
-    for (; spills != nullptr; spills = spills->next) {
-      code->GetInstructionBlock(spills->gap_index)->mark_needs_frame();
+    range->MarkSpilledInDeferredBlock(data()->code());
+    if (range->IsSpilledOnlyInDeferredBlocks()) {
+      for (LiveRange* child = range; child != nullptr; child = child->next()) {
+        if (child->spilled()) {
+          code->GetInstructionBlock(child->Start().ToInstructionIndex())
+              ->mark_needs_frame();
+        }
+      }
+    } else {
+      auto spills = range->spills_at_definition();
+      DCHECK_NOT_NULL(spills);
+      for (; spills != nullptr; spills = spills->next) {
+        code->GetInstructionBlock(spills->gap_index)->mark_needs_frame();
+      }
     }
   }
 }
 
 
 OperandAssigner::OperandAssigner(RegisterAllocationData* data) : data_(data) {}
 
 
 void OperandAssigner::AssignSpillSlots() {
   ZoneVector<SpillRange*>& spill_ranges = data()->spill_ranges();
@@ skipping 464 matching lines @@
     auto eliminate = moves->PrepareInsertAfter(move);
     to_insert.push_back(move);
     if (eliminate != nullptr) to_eliminate.push_back(eliminate);
   }
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8