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Issue 1408123006: Tidy up to enable C4800 on Windows (Closed) Base URL: https://chromium.googlesource.com/crashpad/crashpad@master
Patch Set: . Created 5 years, 2 months ago
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1 // Copyright 2014 The Crashpad Authors. All rights reserved. 1 // Copyright 2014 The Crashpad Authors. All rights reserved.
2 // 2 //
3 // Licensed under the Apache License, Version 2.0 (the "License"); 3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License. 4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at 5 // You may obtain a copy of the License at
6 // 6 //
7 // http://www.apache.org/licenses/LICENSE-2.0 7 // http://www.apache.org/licenses/LICENSE-2.0
8 // 8 //
9 // Unless required by applicable law or agreed to in writing, software 9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS, 10 // distributed under the License is distributed on an "AS IS" BASIS,
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33 }; 33 };
34 34
35 // The x87 tag word (in both abridged and full form) identifies physical 35 // The x87 tag word (in both abridged and full form) identifies physical
36 // registers, but |st_mm| is arranged in logical stack order. In order to map 36 // registers, but |st_mm| is arranged in logical stack order. In order to map
37 // physical tag word bits to the logical stack registers they correspond to, 37 // physical tag word bits to the logical stack registers they correspond to,
38 // the “stack top” value from the x87 status word is necessary. 38 // the “stack top” value from the x87 status word is necessary.
39 int stack_top = (fsw >> 11) & 0x7; 39 int stack_top = (fsw >> 11) & 0x7;
40 40
41 uint16_t fsave_tag = 0; 41 uint16_t fsave_tag = 0;
42 for (int physical_index = 0; physical_index < 8; ++physical_index) { 42 for (int physical_index = 0; physical_index < 8; ++physical_index) {
43 bool fxsave_bit = fxsave_tag & (1 << physical_index); 43 bool fxsave_bit = (fxsave_tag & (1 << physical_index)) != 0;
44 uint8_t fsave_bits; 44 uint8_t fsave_bits;
45 45
46 if (fxsave_bit) { 46 if (fxsave_bit) {
47 int st_index = (physical_index + 8 - stack_top) % 8; 47 int st_index = (physical_index + 8 - stack_top) % 8;
48 const CPUContextX86::X87Register& st = st_mm[st_index].st; 48 const CPUContextX86::X87Register& st = st_mm[st_index].st;
49 49
50 uint32_t exponent = ((st[9] & 0x7f) << 8) | st[8]; 50 uint32_t exponent = ((st[9] & 0x7f) << 8) | st[8];
51 if (exponent == 0x7fff) { 51 if (exponent == 0x7fff) {
52 // Infinity, NaN, pseudo-infinity, or pseudo-NaN. If it was important to 52 // Infinity, NaN, pseudo-infinity, or pseudo-NaN. If it was important to
53 // distinguish between these, the J bit and the M bit (the most 53 // distinguish between these, the J bit and the M bit (the most
54 // significant bit of |fraction|) could be consulted. 54 // significant bit of |fraction|) could be consulted.
55 fsave_bits = kX87TagSpecial; 55 fsave_bits = kX87TagSpecial;
56 } else { 56 } else {
57 // The integer bit the “J bit”. 57 // The integer bit the “J bit”.
58 bool integer_bit = st[7] & 0x80; 58 bool integer_bit = (st[7] & 0x80) != 0;
59 if (exponent == 0) { 59 if (exponent == 0) {
60 uint64_t fraction = ((implicit_cast<uint64_t>(st[7]) & 0x7f) << 56) | 60 uint64_t fraction = ((implicit_cast<uint64_t>(st[7]) & 0x7f) << 56) |
61 (implicit_cast<uint64_t>(st[6]) << 48) | 61 (implicit_cast<uint64_t>(st[6]) << 48) |
62 (implicit_cast<uint64_t>(st[5]) << 40) | 62 (implicit_cast<uint64_t>(st[5]) << 40) |
63 (implicit_cast<uint64_t>(st[4]) << 32) | 63 (implicit_cast<uint64_t>(st[4]) << 32) |
64 (implicit_cast<uint32_t>(st[3]) << 24) | 64 (implicit_cast<uint32_t>(st[3]) << 24) |
65 (st[2] << 16) | (st[1] << 8) | st[0]; 65 (st[2] << 16) | (st[1] << 8) | st[0];
66 if (!integer_bit && fraction == 0) { 66 if (!integer_bit && fraction == 0) {
67 fsave_bits = kX87TagZero; 67 fsave_bits = kX87TagZero;
68 } else { 68 } else {
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92 return x86->eip; 92 return x86->eip;
93 case kCPUArchitectureX86_64: 93 case kCPUArchitectureX86_64:
94 return x86_64->rip; 94 return x86_64->rip;
95 default: 95 default:
96 NOTREACHED(); 96 NOTREACHED();
97 return ~0ull; 97 return ~0ull;
98 } 98 }
99 } 99 }
100 100
101 } // namespace crashpad 101 } // namespace crashpad
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