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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1407613002: Add "add immediate" instruction to the ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix issues in patch set 2. Created 5 years, 2 months ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
(...skipping 75 matching lines...) Expand 10 before | Expand all | Expand 10 after
86 void bindCfgNodeLabel(SizeT NodeNumber) override { 86 void bindCfgNodeLabel(SizeT NodeNumber) override {
87 assert(!getPreliminary()); 87 assert(!getPreliminary());
88 Label *L = getOrCreateCfgNodeLabel(NodeNumber); 88 Label *L = getOrCreateCfgNodeLabel(NodeNumber);
89 this->bind(L); 89 this->bind(L);
90 } 90 }
91 91
92 bool fixupIsPCRel(FixupKind Kind) const override { 92 bool fixupIsPCRel(FixupKind Kind) const override {
93 (void)Kind; 93 (void)Kind;
94 llvm_unreachable("Not yet implemented."); 94 llvm_unreachable("Not yet implemented.");
95 } 95 }
96
96 void bind(Label *label); 97 void bind(Label *label);
97 98
99 // List of instructions implemented by integrated assembler.
100
101 void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
102 bool SetFlags, CondARM32::Cond Cond);
103
98 void bkpt(uint16_t Imm16); 104 void bkpt(uint16_t Imm16);
99 105
100 void mov(RegARM32::GPRRegister Rd, const OperandARM32FlexImm &FlexImm, 106 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
101 CondARM32::Cond Cond);
102 107
103 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); 108 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL);
104 109
105 static bool classof(const Assembler *Asm) { 110 static bool classof(const Assembler *Asm) {
106 return Asm->getKind() == Asm_ARM32; 111 return Asm->getKind() == Asm_ARM32;
107 } 112 }
108 113
109 private: 114 private:
110 // A vector of pool-allocated x86 labels for CFG nodes. 115 // A vector of pool-allocated x86 labels for CFG nodes.
111 using LabelVector = std::vector<Label *>; 116 using LabelVector = std::vector<Label *>;
112 LabelVector CfgNodeLabels; 117 LabelVector CfgNodeLabels;
113 118
114 Label *getOrCreateLabel(SizeT Number, LabelVector &Labels); 119 Label *getOrCreateLabel(SizeT Number, LabelVector &Labels);
115 Label *getOrCreateCfgNodeLabel(SizeT NodeNumber) { 120 Label *getOrCreateCfgNodeLabel(SizeT NodeNumber) {
116 return getOrCreateLabel(NodeNumber, CfgNodeLabels); 121 return getOrCreateLabel(NodeNumber, CfgNodeLabels);
117 } 122 }
118 123
119 void emitInst(uint32_t Value) { Buffer.emit<uint32_t>(Value); } 124 void emitInst(uint32_t Value) { Buffer.emit<uint32_t>(Value); }
120 125
121 // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type, 126 // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type,
122 // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3). 127 // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3).
123 void emitType01(CondARM32::Cond Cond, uint32_t Type, uint32_t Opcode, 128 void emitType01(CondARM32::Cond Cond, uint32_t Type, uint32_t Opcode,
124 bool SetCc, uint32_t Rn, uint32_t Rd, uint32_t imm12); 129 bool SetCc, uint32_t Rn, uint32_t Rd, uint32_t imm12);
125 }; 130 };
126 131
127 } // end of namespace ARM32 132 } // end of namespace ARM32
128 } // end of namespace Ice 133 } // end of namespace Ice
129 134
130 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 135 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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