Make arm assembler explicitly take both registers for load/store-pair.

runtime/vm/intrinsifier_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intrinsifier.h"
 
 #include "vm/assembler.h"
@@ skipping 207 matching lines @@
   /* R4: allocation stats address */                                           \
   /* R6, R7: zero. */                                                          \
   /* data area to be initialized. */                                           \
   __ LoadImmediate(R6, 0);                                                     \
   __ mov(R7, Operand(R6));                                                     \
   __ AddImmediate(R3, R0, sizeof(Raw##type_name) - 1);                         \
   Label init_loop;                                                             \
   __ Bind(&init_loop);                                                         \
   __ AddImmediate(R3, 2 * kWordSize);                                          \
   __ cmp(R3, Operand(R1));                                                     \
-  __ strd(R6, R3, -2 * kWordSize, LS);                                         \
+  __ strd(R6, R7, R3, -2 * kWordSize, LS);                                     \
   __ b(&init_loop, CC);                                                        \
   __ str(R6, Address(R3, -2 * kWordSize), HI);                                 \
                                                                                \
   __ IncrementAllocationStatsWithSize(R4, R2, space);                          \
   __ Ret();                                                                    \
   __ Bind(&fall_through);                                                      \
 
 
 static int GetScaleFactor(intptr_t size) {
   switch (size) {
@@ skipping 523 matching lines @@
   __ SmiTag(R0);
   __ Ret();
 }
 
 
 void Intrinsifier::Bigint_lsh(Assembler* assembler) {
   // static void _lsh(Uint32List x_digits, int x_used, int n,
   //                  Uint32List r_digits)
 
   // R2 = x_used, R3 = x_digits, x_used > 0, x_used is Smi.
-  __ ldrd(R2, SP, 2 * kWordSize);
+  __ ldrd(R2, R3, SP, 2 * kWordSize);
   // R4 = r_digits, R5 = n, n is Smi, n % _DIGIT_BITS != 0.
-  __ ldrd(R4, SP, 0 * kWordSize);
+  __ ldrd(R4, R5, SP, 0 * kWordSize);
   __ SmiUntag(R5);
   // R0 = n ~/ _DIGIT_BITS
   __ Asr(R0, R5, Operand(5));
   // R6 = &x_digits[0]
   __ add(R6, R3, Operand(TypedData::data_offset() - kHeapObjectTag));
   // R7 = &x_digits[x_used]
   __ add(R7, R6, Operand(R2, LSL, 1));
   // R10 = &r_digits[1]
   __ add(R10, R4, Operand(TypedData::data_offset() - kHeapObjectTag +
                          Bigint::kBytesPerDigit));
@@ skipping 17 matching lines @@
   // Returning Object::null() is not required, since this method is private.
   __ Ret();
 }
 
 
 void Intrinsifier::Bigint_rsh(Assembler* assembler) {
   // static void _lsh(Uint32List x_digits, int x_used, int n,
   //                  Uint32List r_digits)
 
   // R2 = x_used, R3 = x_digits, x_used > 0, x_used is Smi.
-  __ ldrd(R2, SP, 2 * kWordSize);
+  __ ldrd(R2, R3, SP, 2 * kWordSize);
   // R4 = r_digits, R5 = n, n is Smi, n % _DIGIT_BITS != 0.
-  __ ldrd(R4, SP, 0 * kWordSize);
+  __ ldrd(R4, R5, SP, 0 * kWordSize);
   __ SmiUntag(R5);
   // R0 = n ~/ _DIGIT_BITS
   __ Asr(R0, R5, Operand(5));
   // R10 = &r_digits[0]
   __ add(R10, R4, Operand(TypedData::data_offset() - kHeapObjectTag));
   // R7 = &x_digits[n ~/ _DIGIT_BITS]
   __ add(R7, R3, Operand(TypedData::data_offset() - kHeapObjectTag));
   __ add(R7, R7, Operand(R0, LSL, 2));
   // R6 = &r_digits[x_used - n ~/ _DIGIT_BITS - 1]
   __ add(R0, R0, Operand(1));
@@ skipping 22 matching lines @@
   __ Ret();
 }
 
 
 void Intrinsifier::Bigint_absAdd(Assembler* assembler) {
   // static void _absAdd(Uint32List digits, int used,
   //                     Uint32List a_digits, int a_used,
   //                     Uint32List r_digits)
 
   // R2 = used, R3 = digits
-  __ ldrd(R2, SP, 3 * kWordSize);
+  __ ldrd(R2, R3, SP, 3 * kWordSize);
   // R3 = &digits[0]
   __ add(R3, R3, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R4 = a_used, R5 = a_digits
-  __ ldrd(R4, SP, 1 * kWordSize);
+  __ ldrd(R4, R5, SP, 1 * kWordSize);
   // R5 = &a_digits[0]
   __ add(R5, R5, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R6 = r_digits
   __ ldr(R6, Address(SP, 0 * kWordSize));
   // R6 = &r_digits[0]
   __ add(R6, R6, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R7 = &digits[a_used >> 1], a_used is Smi.
   __ add(R7, R3, Operand(R4, LSL, 1));
@@ skipping 34 matching lines @@
   __ Ret();
 }
 
 
 void Intrinsifier::Bigint_absSub(Assembler* assembler) {
   // static void _absSub(Uint32List digits, int used,
   //                     Uint32List a_digits, int a_used,
   //                     Uint32List r_digits)
 
   // R2 = used, R3 = digits
-  __ ldrd(R2, SP, 3 * kWordSize);
+  __ ldrd(R2, R3, SP, 3 * kWordSize);
   // R3 = &digits[0]
   __ add(R3, R3, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R4 = a_used, R5 = a_digits
-  __ ldrd(R4, SP, 1 * kWordSize);
+  __ ldrd(R4, R5, SP, 1 * kWordSize);
   // R5 = &a_digits[0]
   __ add(R5, R5, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R6 = r_digits
   __ ldr(R6, Address(SP, 0 * kWordSize));
   // R6 = &r_digits[0]
   __ add(R6, R6, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R7 = &digits[a_used >> 1], a_used is Smi.
   __ add(R7, R3, Operand(R4, LSL, 1));
@@ skipping 54 matching lines @@
   //   while (c != 0) {
   //     uint64_t t = *ajp + c;
   //     *ajp++ = low32(t);
   //     c = high32(t);  // c == 0 or 1.
   //   }
   //   return 1;
   // }
 
   Label done;
   // R3 = x, no_op if x == 0
-  __ ldrd(R0, SP, 5 * kWordSize);  // R0 = xi as Smi, R1 = x_digits.
+  __ ldrd(R0, R1, SP, 5 * kWordSize);  // R0 = xi as Smi, R1 = x_digits.
   __ add(R1, R1, Operand(R0, LSL, 1));
   __ ldr(R3, FieldAddress(R1, TypedData::data_offset()));
   __ tst(R3, Operand(R3));
   __ b(&done, EQ);
 
   // R6 = SmiUntag(n), no_op if n == 0
   __ ldr(R6, Address(SP, 0 * kWordSize));
   __ Asrs(R6, R6, Operand(kSmiTagSize));
   __ b(&done, EQ);
 
   // R4 = mip = &m_digits[i >> 1]
-  __ ldrd(R0, SP, 3 * kWordSize);  // R0 = i as Smi, R1 = m_digits.
+  __ ldrd(R0, R1, SP, 3 * kWordSize);  // R0 = i as Smi, R1 = m_digits.
   __ add(R1, R1, Operand(R0, LSL, 1));
   __ add(R4, R1, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R5 = ajp = &a_digits[j >> 1]
-  __ ldrd(R0, SP, 1 * kWordSize);  // R0 = j as Smi, R1 = a_digits.
+  __ ldrd(R0, R1, SP, 1 * kWordSize);  // R0 = j as Smi, R1 = a_digits.
   __ add(R1, R1, Operand(R0, LSL, 1));
   __ add(R5, R1, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R1 = c = 0
   __ mov(R1, Operand(0));
 
   Label muladd_loop;
   __ Bind(&muladd_loop);
   // x:   R3
   // mip: R4
@@ skipping 62 matching lines @@
   //     c = high64(t);  // 33-bit.
   //   }
   //   uint32_t aj = *ajp;
   //   uint64_t t = aj + c;  // 32-bit + 33-bit -> 34-bit.
   //   *ajp++ = low32(t);
   //   *ajp = high32(t);
   //   return 1;
   // }
 
   // R4 = xip = &x_digits[i >> 1]
-  __ ldrd(R2, SP, 2 * kWordSize);  // R2 = i as Smi, R3 = x_digits
+  __ ldrd(R2, R3, SP, 2 * kWordSize);  // R2 = i as Smi, R3 = x_digits
   __ add(R3, R3, Operand(R2, LSL, 1));
   __ add(R4, R3, Operand(TypedData::data_offset() - kHeapObjectTag));
 
   // R3 = x = *xip++, return if x == 0
   Label x_zero;
   __ ldr(R3, Address(R4, Bigint::kBytesPerDigit, Address::PostIndex));
   __ tst(R3, Operand(R3));
   __ b(&x_zero, EQ);
 
   // R5 = ajp = &a_digits[i]
@@ skipping 57 matching lines @@
   __ Bind(&done);
   // uint32_t aj = *ajp
   __ ldr(R0, Address(R5, 0));
 
   // uint64_t t = aj + c
   __ adds(R6, R6, Operand(R0));
   __ adc(R7, R7, Operand(0));
 
   // *ajp = low32(t) = R6
   // *(ajp + 1) = high32(t) = R7
-  __ strd(R6, R5, 0);
+  __ strd(R6, R7, R5, 0);
 
   __ Bind(&x_zero);
   __ mov(R0, Operand(Smi::RawValue(1)));  // One digit processed.
   __ Ret();
 }
 
 
 void Intrinsifier::Bigint_estQuotientDigit(Assembler* assembler) {
   // No unsigned 64-bit / 32-bit divide instruction.
 }
@@ skipping 10 matching lines @@
   // }
 
   // R4 = args
   __ ldr(R4, Address(SP, 2 * kWordSize));  // args
 
   // R3 = rho = args[2]
   __ ldr(R3, FieldAddress(R4,
                           TypedData::data_offset() + 2*Bigint::kBytesPerDigit));
 
   // R2 = digits[i >> 1]
-  __ ldrd(R0, SP, 0 * kWordSize);  // R0 = i as Smi, R1 = digits
+  __ ldrd(R0, R1, SP, 0 * kWordSize);  // R0 = i as Smi, R1 = digits
   __ add(R1, R1, Operand(R0, LSL, 1));
   __ ldr(R2, FieldAddress(R1, TypedData::data_offset()));
 
   // R1:R0 = t = rho*d
   __ umull(R0, R1, R2, R3);
 
   // args[4] = t mod DIGIT_BASE = low32(t)
   __ str(R0,
          FieldAddress(R4, TypedData::data_offset() + 4*Bigint::kBytesPerDigit));
 
@@ skipping 787 matching lines @@
 
 void Intrinsifier::Profiler_getCurrentTag(Assembler* assembler) {
   __ LoadIsolate(R0);
   __ ldr(R0, Address(R0, Isolate::current_tag_offset()));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM