Make arm assembler explicitly take both registers for load/store-pair.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 475 matching lines @@
 void Assembler::ldrsb(Register rd, Address ad, Condition cond) {
   EmitMemOpAddressMode3(cond, L | B7 | B6 | B4, rd, ad);
 }
 
 
 void Assembler::ldrsh(Register rd, Address ad, Condition cond) {
   EmitMemOpAddressMode3(cond, L | B7 | B6 | H | B4, rd, ad);
 }
 
 
-void Assembler::ldrd(Register rd, Register rn, int32_t offset, Condition cond) {
+void Assembler::ldrd(Register rd, Register rd2, Register rn, int32_t offset,
+                     Condition cond) {
   ASSERT((rd % 2) == 0);
+  ASSERT(rd2 == rd + 1);
   if (TargetCPUFeatures::arm_version() == ARMv5TE) {
-    const Register rd2 = static_cast<Register>(static_cast<int32_t>(rd) + 1);
     ldr(rd, Address(rn, offset), cond);
     ldr(rd2, Address(rn, offset + kWordSize), cond);
   } else {
     EmitMemOpAddressMode3(cond, B7 | B6 | B4, rd, Address(rn, offset));
   }
 }
 
 
-void Assembler::strd(Register rd, Register rn, int32_t offset, Condition cond) {
+void Assembler::strd(Register rd, Register rd2, Register rn, int32_t offset,
+                     Condition cond) {
   ASSERT((rd % 2) == 0);
+  ASSERT(rd2 == rd + 1);
   if (TargetCPUFeatures::arm_version() == ARMv5TE) {
-    const Register rd2 = static_cast<Register>(static_cast<int32_t>(rd) + 1);
     str(rd, Address(rn, offset), cond);
     str(rd2, Address(rn, offset + kWordSize), cond);
   } else {
     EmitMemOpAddressMode3(cond, B7 | B6 | B5 | B4, rd, Address(rn, offset));
   }
 }
 
 
 void Assembler::ldm(BlockAddressMode am, Register base, RegList regs,
                     Condition cond) {
@@ skipping 1178 matching lines @@
   str(value, Address(base, offset), cond);
 }
 
 
 void Assembler::WriteShadowedFieldPair(Register base,
                                        intptr_t offset,
                                        Register value_even,
                                        Register value_odd,
                                        Condition cond) {
   ASSERT(value_odd == value_even + 1);
+  ASSERT(value_even % 2 == 0);
   if (VerifiedMemory::enabled()) {
     ASSERT(base != value_even);
     ASSERT(base != value_odd);
     Operand shadow(GetVerifiedMemoryShadow());
     add(base, base, shadow, cond);
-    strd(value_even, base, offset, cond);
+    strd(value_even, value_odd, base, offset, cond);
     sub(base, base, shadow, cond);
   }
-  strd(value_even, base, offset, cond);
+  strd(value_even, value_odd, base, offset, cond);
 }
 
 
 Register UseRegister(Register reg, RegList* used) {
   ASSERT(reg != SP);
   ASSERT(reg != PC);
   ASSERT((*used & (1 << reg)) == 0);
   *used |= (1 << reg);
   return reg;
 }
@@ skipping 1095 matching lines @@
     vmovdrr(dd, IP, scratch, cond);
   }
 }
 
 
 void Assembler::LoadFromOffset(OperandSize size,
                                Register reg,
                                Register base,
                                int32_t offset,
                                Condition cond) {
+  ASSERT(size != kWordPair);
   int32_t offset_mask = 0;
   if (!Address::CanHoldLoadOffset(size, offset, &offset_mask)) {
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   switch (size) {
     case kByte:
       ldrsb(reg, Address(base, offset), cond);
       break;
     case kUnsignedByte:
       ldrb(reg, Address(base, offset), cond);
       break;
     case kHalfword:
       ldrsh(reg, Address(base, offset), cond);
       break;
     case kUnsignedHalfword:
       ldrh(reg, Address(base, offset), cond);
       break;
     case kWord:
       ldr(reg, Address(base, offset), cond);
       break;
-    case kWordPair:
-      ldrd(reg, base, offset, cond);
-      break;
     default:
       UNREACHABLE();
   }
 }
 
 
 void Assembler::StoreToOffset(OperandSize size,
                               Register reg,
                               Register base,
                               int32_t offset,
                               Condition cond) {
+  ASSERT(size != kWordPair);
   int32_t offset_mask = 0;
   if (!Address::CanHoldStoreOffset(size, offset, &offset_mask)) {
     ASSERT(reg != IP);
     ASSERT(base != IP);
     AddImmediate(IP, base, offset & ~offset_mask, cond);
     base = IP;
     offset = offset & offset_mask;
   }
   switch (size) {
     case kByte:
       strb(reg, Address(base, offset), cond);
       break;
     case kHalfword:
       strh(reg, Address(base, offset), cond);
       break;
     case kWord:
       str(reg, Address(base, offset), cond);
       break;
-    case kWordPair:
-      strd(reg, base, offset, cond);
-      break;
     default:
       UNREACHABLE();
   }
 }
 
 
 void Assembler::LoadSFromOffset(SRegister reg,
                                 Register base,
                                 int32_t offset,
                                 Condition cond) {
@@ skipping 738 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM