Generate block labels in the ARM hybrid assembler.

src/IceAssemblerARM32.h

 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 21 matching lines @@
 #include "IceDefs.h"
 #include "IceFixups.h"
 #include "IceInstARM32.h"
 #include "IceRegistersARM32.h"
 #include "IceTargetLowering.h"
 
 namespace Ice {
 namespace ARM32 {
 
 class AssemblerARM32 : public Assembler {
+  AssemblerARM32() = delete;
   AssemblerARM32(const AssemblerARM32 &) = delete;
   AssemblerARM32 &operator=(const AssemblerARM32 &) = delete;
 
 public:
   explicit AssemblerARM32(GlobalContext *Ctx, bool use_far_branches = false)
       : Assembler(Asm_ARM32, Ctx) {
     // TODO(kschimpf): Add mode if needed when branches are handled.
     (void)use_far_branches;
   }
-  ~AssemblerARM32() override = default;
+  ~AssemblerARM32() override {
+    if (BuildDefs::asserts()) {
+      for (const Label *Label : CfgNodeLabels) {
+        Label->finalCheck();
+      }
+      for (const Label *Label : LocalLabels) {
+        Label->finalCheck();
+      }
+    }
+  }
 
   void alignFunction() override {
     const SizeT Align = 1 << getBundleAlignLog2Bytes();
     SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align);
     constexpr uint32_t UndefinedInst = 0xe7fedef0; // udf #60896
     constexpr SizeT InstSize = sizeof(int32_t);
     assert(BytesNeeded % InstSize == 0);
     while (BytesNeeded > 0) {
       AssemblerBuffer::EnsureCapacity ensured(&Buffer);
       emitInst(UndefinedInst);
@@ skipping 15 matching lines @@
   void padWithNop(intptr_t Padding) override {
     (void)Padding;
     llvm_unreachable("Not yet implemented.");
   }
 
   Ice::Label *getCfgNodeLabel(SizeT NodeNumber) override {
     assert(NodeNumber < CfgNodeLabels.size());
     return CfgNodeLabels[NodeNumber];
   }
 
-  void bindCfgNodeLabel(SizeT NodeNumber) override {
-    assert(!getPreliminary());
-    Label *L = getOrCreateCfgNodeLabel(NodeNumber);
-    this->bind(L);
+  void bindCfgNodeLabel(const CfgNode *Node) override;
+
+  void bindLocalLabel(SizeT Number) {
+    Label *L = getOrCreateLocalLabel(Number);
+    if (!getPreliminary())
+      this->bind(L);
   }
 
   bool fixupIsPCRel(FixupKind Kind) const override {
     (void)Kind;
     // TODO(kschimpf) Decide if we need this.
     return false;
   }
 
   void bind(Label *label);
 
@@ skipping 12 matching lines @@
 
   void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond);
 
   void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
   static bool classof(const Assembler *Asm) {
     return Asm->getKind() == Asm_ARM32;
   }
 
-  void emitTextInst(const std::string &Text);
+  void emitTextInst(const std::string &Text, SizeT InstSize = sizeof(uint32_t));
 
 private:
   // A vector of pool-allocated x86 labels for CFG nodes.
   using LabelVector = std::vector<Label *>;
   LabelVector CfgNodeLabels;
+  // A vector of pool-allocated x86 labels for Local labels.
+  LabelVector LocalLabels;
 
   Label *getOrCreateLabel(SizeT Number, LabelVector &Labels);
   Label *getOrCreateCfgNodeLabel(SizeT NodeNumber) {
     return getOrCreateLabel(NodeNumber, CfgNodeLabels);
   }
+  Label *getOrCreateLocalLabel(SizeT Number) {
+    return getOrCreateLabel(Number, LocalLabels);
+  }
 
   void emitInst(uint32_t Value) { Buffer.emit<uint32_t>(Value); }
 
   // Pattern cccctttoooosnnnnddddiiiiiiiiiiii where cccc=Cond, ttt=Type,
   // oooo=Opcode, nnnn=Rn, dddd=Rd, iiiiiiiiiiii=imm12 (See ARM section A5.2.3).
   void emitType01(CondARM32::Cond Cond, uint32_t Type, uint32_t Opcode,
                   bool SetCc, uint32_t Rn, uint32_t Rd, uint32_t imm12);
 
   // Pattern ccccoooaabalnnnnttttaaaaaaaaaaaa where cccc=Cond, ooo=InstType,
   // l=isLoad, b=isByte, and aaa0a0aaaa0000aaaaaaaaaaaa=Address. Note that
   // Address is assumed to be defined by decodeAddress() in
   // IceAssemblerARM32.cpp.
   void emitMemOp(CondARM32::Cond Cond, uint32_t InstType, bool IsLoad,
                  bool IsByte, uint32_t Rt, uint32_t Address);
 };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H