Subzero. Misc ARM32 bugfixes.

tests_lit/llvm2ice_tests/bool-folding.ll

 ; This tests the optimization where producers and consumers of i1 (bool)
 ; variables are combined to implicitly use flags instead of explicitly using
 ; stack or register variables.
 
 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
 ; RUN:   -allow-externally-defined-symbols | FileCheck %s
 
 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
 ; RUN:   --target arm32 -i %s --args -O2 --skip-unimplemented \
 ; RUN:   -allow-externally-defined-symbols \
@@ skipping 208 matching lines @@
 ; CHECK-LABEL: fold_cmp_select_multi
 ; CHECK: cmp
 ; CHECK: cmovl
 ; CHECK: cmp
 ; CHECK: cmovl
 ; CHECK: cmp
 ; CHECK: cmovge
 ; CHECK: add
 ; CHECK: add
 ; ARM32-LABEL: fold_cmp_select_multi
-; ARM32-DAG: mov [[T0:r[0-9]+]], #0
-; ARM32-DAG: cmp r0, r1
+; ARM32: mov [[T0:r[0-9]+]], #0
+; ARM32: cmp r0, r1
 ; ARM32: movlt [[T0]], #1
-; ARM32-DAG: mov [[T1:r[0-9]+]], r1
-; ARM32-DAG: cmp [[T0]], #0
-; ARM32: [[T1]], r0
-; ARM32-DAG: mov [[T2:r[0-9]+]], r0
-; ARM32-DAG: cmp [[T0]], #0
-; ARM32: [[T2]], r1
-; ARM32: cmp [[T0]], #0
-; ARM32: movne
-; ARM32: add
-; ARM32: add
+; ARM32: uxtb [[T1:r[0-9]+]], [[T1]]
+; ARM32-NEXT: cmp [[T1]], #0
+; ARM32: movne [[T2:r[0-9]+]], r0
+; ARM32: uxtb [[T3:r[0-9]+]], [[T3]]
+; ARM32-NEXT: cmp [[T3]], #0
+; ARM32: movne [[T4:r[0-9]+]], r1
+; ARM32: uxtb [[T5:r[0-9]+]], [[T5]]
+; ARM32-NEXT: cmp [[T5]], #0
+; ARM32: movne [[T6:r[0-9]+]], #123
+; ARM32: add [[T7:r[0-9]+]], [[T2]], [[T4]]
+; ARM32: add {{r[0-9]+}}, [[T7]], [[T6]]
 ; ARM32: bx lr
 
 
 ; Cmp/multi-select non-folding because of live-out.
 define internal i32 @no_fold_cmp_select_multi_liveout(i32 %arg1, i32 %arg2) {
 entry:
   %cmp1 = icmp slt i32 %arg1, %arg2
   %a = select i1 %cmp1, i32 %arg1, i32 %arg2
   %b = select i1 %cmp1, i32 %arg2, i32 %arg1
   br label %next
 next:
   %c = select i1 %cmp1, i32 123, i32 %arg1
   %partial = add i32 %a, %b
   %result = add i32 %partial, %c
   ret i32 %result
 }
 
 ; CHECK-LABEL: no_fold_cmp_select_multi_liveout
 ; CHECK: set
 ; CHECK: cmp
 ; CHECK: cmovne
 ; CHECK: cmp
 ; CHECK: cmovne
 ; CHECK: cmp
 ; CHECK: cmove
 ; CHECK: add
 ; CHECK: add
 ; ARM32-LABEL: no_fold_cmp_select_multi_liveout
 ; ARM32-LABEL: fold_cmp_select_multi
-; ARM32-DAG: mov [[T0:r[0-9]+]], #0
-; ARM32-DAG: cmp r0, r1
+; ARM32: mov [[T0:r[0-9]+]], #0
+; ARM32: cmp r0, r1
 ; ARM32: movlt [[T0]], #1
-; ARM32-DAG: mov [[T1:r[0-9]+]], r1
-; ARM32-DAG: cmp [[T0]], #0
-; ARM32: [[T1]], r0
-; ARM32-DAG: mov [[T2:r[0-9]+]], r0
-; ARM32-DAG: cmp [[T0]], #0
-; ARM32: [[T2]], r1
-; ARM32: cmp [[T0]], #0
-; ARM32: movne
-; ARM32: add
-; ARM32: add
+; ARM32: uxtb [[T2:r[0-9]+]], [[T2]]
+; ARM32-NEXT: cmp [[T2]], #0
+; ARM32: movne [[T1]], r0
+; ARM32: uxtb [[T4:r[0-9]+]], [[T4]]
+; ARM32-NEXT: cmp [[T4]], #0
+; ARM32: movne [[T3]], r1
+; ARM32-LABEL: .Lno_fold_cmp_select_multi_liveout$next:
+; ARM32: uxtb [[T5:r[0-9]+]], [[T5]]
+; ARM32: cmp [[T5]], #0
+; ARM32: movne [[T6:r[0-9]+]], #123
+; ARM32: add [[T7:r[0-9]+]], [[T2]], [[T4]]
+; ARM32: add {{r[0-9]+}}, [[T7]], [[T6]]
 ; ARM32: bx lr
 
 ; Cmp/multi-select non-folding because of extra non-whitelisted uses.
 define internal i32 @no_fold_cmp_select_multi_non_whitelist(i32 %arg1,
                                                             i32 %arg2) {
 entry:
   %cmp1 = icmp slt i32 %arg1, %arg2
   %a = select i1 %cmp1, i32 %arg1, i32 %arg2
   %b = select i1 %cmp1, i32 %arg2, i32 %arg1
   %c = select i1 %cmp1, i32 123, i32 %arg1
@@ skipping 10 matching lines @@
 ; CHECK: cmovne
 ; CHECK: cmp
 ; CHECK: cmovne
 ; CHECK: cmp
 ; CHECK: cmove
 ; CHECK: movzx
 ; CHECK: add
 ; CHECK: add
 ; CHECK: add
 ; ARM32-LABEL: no_fold_cmp_select_multi_non_whitelist
-; ARM32-DAG: mov [[T0:r[0-9]+]], #0
-; ARM32-DAG: cmp r0, r1
+; ARM32: mov [[T0:r[0-9]+]], #0
+; ARM32: cmp r0, r1
 ; ARM32: movlt [[T0]], #1
-; ARM32-DAG: mov [[T1:r[0-9]+]], r1
-; ARM32-DAG: cmp [[T0]], #0
-; ARM32: [[T1]], r0
-; ARM32-DAG: mov [[T2:r[0-9]+]], r0
-; ARM32-DAG: cmp [[T0]], #0
-; ARM32: [[T2]], r1
-; ARM32: cmp [[T0]], #0
-; ARM32: movne
-; ARM32: and {{.*}}, [[T0]], #1
-; ARM32: add
-; ARM32: add
-; ARM32: add
+; ARM32: uxtb [[T1:r[0-9]+]], [[T1]]
+; ARM32-NEXT: cmp [[T1]], #0
+; ARM32: movne [[T2:r[0-9]+]], r0
+; ARM32: uxtb [[T3:r[0-9]+]], [[T3]]
+; ARM32-NEXT: cmp [[T3]], #0
+; ARM32: movne [[T4:r[0-9]+]], r1
+; ARM32: uxtb [[T5:r[0-9]+]], [[T5]]
+; ARM32-NEXT: cmp [[T5]], #0
+; ARM32: movne [[T6:r[0-9]+]], #123
+; ARM32: and [[T7:r[0-9]+]], [[T0]], #1
+; ARM32: add [[T8:r[0-9]+]], [[T2]], [[T4]]
+; ARM32: add {{r[0-9]+}}, [[T8]], [[T7]]
 ; ARM32: bx lr