provides a mechanism for optimizing compilers to select the different Register configuration.

test/unittests/compiler/instruction-selector-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
 #include "src/compiler/graph.h"
 #include "src/compiler/schedule.h"
 #include "src/flags.h"
 #include "test/unittests/compiler/compiler-test-utils.h"
@@ skipping 33 matching lines @@
   InstructionSequence sequence(test_->isolate(), test_->zone(),
                                instruction_blocks);
   SourcePositionTable source_position_table(graph());
   InstructionSelector selector(test_->zone(), node_count, &linkage, &sequence,
                                schedule, &source_position_table,
                                source_position_mode, features);
   selector.SelectInstructions();
   if (FLAG_trace_turbo) {
     OFStream out(stdout);
     PrintableInstructionSequence printable = {
-        RegisterConfiguration::ArchDefault(), &sequence};
+        RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN),
+        &sequence};
     out << "=== Code sequence after instruction selection ===" << std::endl
         << printable;
   }
   Stream s;
   s.virtual_registers_ = selector.GetVirtualRegistersForTesting();
   // Map virtual registers.
   for (Instruction* const instr : sequence) {
     if (instr->opcode() < 0) continue;
     if (mode == kTargetInstructions) {
       switch (instr->arch_opcode()) {
@@ skipping 547 matching lines @@
   EXPECT_EQ(s.ToVreg(context2), s.ToVreg(call_instr->InputAt(14)));
   // Continuation.
 
   EXPECT_EQ(kArchRet, s[index++]->arch_opcode());
   EXPECT_EQ(index, s.size());
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8