provides a mechanism for optimizing compilers to select the different Register configuration.

test/cctest/test-code-stubs-mips64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Rrdistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Rrdistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Rrdistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 62 matching lines @@
     __ Move(f12, a0, a1);
   }
   // Push the double argument.
   __ Dsubu(sp, sp, Operand(kDoubleSize));
   __ sdc1(f12, MemOperand(sp));
   __ Move(source_reg, sp);
 
   // Save registers make sure they don't get clobbered.
   int source_reg_offset = kDoubleSize;
   int reg_num = 2;
-  const RegisterConfiguration* config = RegisterConfiguration::ArchDefault();
+  const RegisterConfiguration* config =
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT);
   for (; reg_num < config->num_allocatable_general_registers(); ++reg_num) {
     Register reg = Register::from_code(reg_num);
     if (!reg.is(destination_reg)) {
       __ push(reg);
       source_reg_offset += kPointerSize;
     }
   }
 
   // Re-push the double argument.
   __ Dsubu(sp, sp, Operand(kDoubleSize));
@@ skipping 96 matching lines @@
                                         false));
       RunAllTruncationTests(
           RunGeneratedCodeCallWrapper,
           MakeConvertDToIFuncTrampoline(isolate,
                                         source_registers[s],
                                         dest_registers[d],
                                         true));
     }
   }
 }