provides a mechanism for optimizing compilers to select the different Register configuration.

test/cctest/compiler/test-run-native-calls.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/assembler.h"
 #include "src/codegen.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/machine-type.h"
 #include "src/compiler/raw-machine-assembler.h"
 #include "src/register-configuration.h"
@@ skipping 68 matching lines @@
   int counter_;
   bool exhaustive() { return max_pairs_ == (range_ * range_); }
 };
 
 
 // Pairs of general purpose registers.
 class RegisterPairs : public Pairs {
  public:
   RegisterPairs()
       : Pairs(
-            100, RegisterConfiguration::ArchDefault()
-                     ->num_allocatable_general_registers(),
-            RegisterConfiguration::ArchDefault()->allocatable_general_codes()) {
-  }
+            100,
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->num_allocatable_general_registers(),
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->allocatable_general_codes()) {}
 };
 
 
 // Pairs of double registers.
 class Float32RegisterPairs : public Pairs {
  public:
   Float32RegisterPairs()
       : Pairs(
-            100, RegisterConfiguration::ArchDefault()
-                     ->num_allocatable_aliased_double_registers(),
-            RegisterConfiguration::ArchDefault()->allocatable_double_codes()) {}
+            100,
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->num_allocatable_aliased_double_registers(),
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->allocatable_double_codes()) {}
 };
 
 
 // Pairs of double registers.
 class Float64RegisterPairs : public Pairs {
  public:
   Float64RegisterPairs()
       : Pairs(
-            100, RegisterConfiguration::ArchDefault()
-                     ->num_allocatable_aliased_double_registers(),
-            RegisterConfiguration::ArchDefault()->allocatable_double_codes()) {}
+            100,
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->num_allocatable_aliased_double_registers(),
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->allocatable_double_codes()) {}
 };
 
 
 // Helper for allocating either an GP or FP reg, or the next stack slot.
 struct Allocator {
   Allocator(int* gp, int gpc, int* fp, int fpc)
       : gp_count(gpc),
         gp_offset(0),
         gp_regs(gp),
         fp_count(fpc),
@@ skipping 558 matching lines @@
 
 
 TEST(Run_CopyTwentyInt32_all_allocatable_pairs) {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
   Int32Signature sig(20);
   RegisterPairs pairs;
   while (pairs.More()) {
     Zone zone;
     int parray[2];
     int rarray[] = {
-        RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0)};
+        RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+            ->GetAllocatableGeneralCode(0)};
     pairs.Next(&parray[0], &parray[1], false);
     Allocator params(parray, 2, nullptr, 0);
     Allocator rets(rarray, 1, nullptr, 0);
     RegisterConfig config(params, rets);
     CallDescriptor* desc = config.Create(&zone, &sig);
     CopyTwentyInt32(desc);
   }
 }
 
 
@@ skipping 32 matching lines @@
 
 static void Test_Int32_WeightedSum_of_size(int count) {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
   Int32Signature sig(count);
   for (int p0 = 0; p0 < Register::kNumRegisters; p0++) {
     if (Register::from_code(p0).IsAllocatable()) {
       Zone zone;
 
       int parray[] = {p0};
       int rarray[] = {
-          RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0)};
+          RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+              ->GetAllocatableGeneralCode(0)};
       Allocator params(parray, 1, nullptr, 0);
       Allocator rets(rarray, 1, nullptr, 0);
       RegisterConfig config(params, rets);
       CallDescriptor* desc = config.Create(&zone, &sig);
       Run_Computation<int32_t>(desc, Build_Int32_WeightedSum,
                                Compute_Int32_WeightedSum, 257 + count);
     }
   }
 }
 
@@ skipping 35 matching lines @@
                          Compute_Select<CType, which>,
                          1044 + which + 3 * sizeof(CType));
 }
 
 
 template <int which>
 void Test_Int32_Select() {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
 
   int parray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableGeneralCode(0)};
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableGeneralCode(0)};
   Allocator params(parray, 1, nullptr, 0);
   Allocator rets(rarray, 1, nullptr, 0);
   RegisterConfig config(params, rets);
 
   Zone zone;
 
   for (int i = which + 1; i <= 64; i++) {
     Int32Signature sig(i);
     CallDescriptor* desc = config.Create(&zone, &sig);
     RunSelect<int32_t, which>(desc);
@@ skipping 15 matching lines @@
 TEST_INT32_SELECT(6)
 TEST_INT32_SELECT(11)
 TEST_INT32_SELECT(15)
 TEST_INT32_SELECT(19)
 TEST_INT32_SELECT(45)
 TEST_INT32_SELECT(62)
 TEST_INT32_SELECT(63)
 
 
 TEST(Int64Select_registers) {
-  if (RegisterConfiguration::ArchDefault()
+  if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
           ->num_allocatable_general_registers() < 2)
     return;
   if (kPointerSize < 8) return;  // TODO(titzer): int64 on 32-bit platforms
 
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableGeneralCode(0)};
   ArgsBuffer<int64_t>::Sig sig(2);
 
   RegisterPairs pairs;
   Zone zone;
   while (pairs.More()) {
     int parray[2];
     pairs.Next(&parray[0], &parray[1], false);
     Allocator params(parray, 2, nullptr, 0);
     Allocator rets(rarray, 1, nullptr, 0);
     RegisterConfig config(params, rets);
 
     CallDescriptor* desc = config.Create(&zone, &sig);
     RunSelect<int64_t, 0>(desc);
     RunSelect<int64_t, 1>(desc);
   }
 }
 
 
 TEST(Float32Select_registers) {
-  if (RegisterConfiguration::ArchDefault()->num_allocatable_double_registers() <
-      2) {
+  if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->num_allocatable_double_registers() < 2) {
     return;
   }
 
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0)};
   ArgsBuffer<float32>::Sig sig(2);
 
   Float32RegisterPairs pairs;
   Zone zone;
   while (pairs.More()) {
     int parray[2];
     pairs.Next(&parray[0], &parray[1], false);
     Allocator params(nullptr, 0, parray, 2);
     Allocator rets(nullptr, 0, rarray, 1);
     RegisterConfig config(params, rets);
 
     CallDescriptor* desc = config.Create(&zone, &sig);
     RunSelect<float32, 0>(desc);
     RunSelect<float32, 1>(desc);
   }
 }
 
 
 TEST(Float64Select_registers) {
-  if (RegisterConfiguration::ArchDefault()->num_allocatable_double_registers() <
-      2)
+  if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->num_allocatable_double_registers() < 2)
     return;
-  if (RegisterConfiguration::ArchDefault()
+  if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
           ->num_allocatable_general_registers() < 2)
     return;
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0)};
   ArgsBuffer<float64>::Sig sig(2);
 
   Float64RegisterPairs pairs;
   Zone zone;
   while (pairs.More()) {
     int parray[2];
     pairs.Next(&parray[0], &parray[1], false);
     Allocator params(nullptr, 0, parray, 2);
     Allocator rets(nullptr, 0, rarray, 1);
     RegisterConfig config(params, rets);
 
     CallDescriptor* desc = config.Create(&zone, &sig);
     RunSelect<float64, 0>(desc);
     RunSelect<float64, 1>(desc);
   }
 }
 
 
 TEST(Float32Select_stack_params_return_reg) {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0)};
   Allocator params(nullptr, 0, nullptr, 0);
   Allocator rets(nullptr, 0, rarray, 1);
   RegisterConfig config(params, rets);
 
   Zone zone;
   for (int count = 1; count < 6; count++) {
     ArgsBuffer<float32>::Sig sig(count);
     CallDescriptor* desc = config.Create(&zone, &sig);
     RunSelect<float32, 0>(desc);
     RunSelect<float32, 1>(desc);
     RunSelect<float32, 2>(desc);
     RunSelect<float32, 3>(desc);
     RunSelect<float32, 4>(desc);
     RunSelect<float32, 5>(desc);
   }
 }
 
 
 TEST(Float64Select_stack_params_return_reg) {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0)};
   Allocator params(nullptr, 0, nullptr, 0);
   Allocator rets(nullptr, 0, rarray, 1);
   RegisterConfig config(params, rets);
 
   Zone zone;
   for (int count = 1; count < 6; count++) {
     ArgsBuffer<float64>::Sig sig(count);
     CallDescriptor* desc = config.Create(&zone, &sig);
     RunSelect<float64, 0>(desc);
     RunSelect<float64, 1>(desc);
@@ skipping 34 matching lines @@
     Node* call = raw.CallN(desc, target, args);
     raw.Return(call);
   }
 }
 
 
 TEST(Float64StackParamsToStackParams) {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
 
   int rarray[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0)};
   Allocator params(nullptr, 0, nullptr, 0);
   Allocator rets(nullptr, 0, rarray, 1);
 
   Zone zone;
   ArgsBuffer<float64>::Sig sig(2);
   RegisterConfig config(params, rets);
   CallDescriptor* desc = config.Create(&zone, &sig);
 
   Run_Computation<float64>(desc, Build_Select_With_Call<float64, 0>,
                            Compute_Select<float64, 0>, 1098);
 
   Run_Computation<float64>(desc, Build_Select_With_Call<float64, 1>,
                            Compute_Select<float64, 1>, 1099);
 }
 
 
 void MixedParamTest(int start) {
   if (DISABLE_NATIVE_STACK_PARAMS) return;
-  if (RegisterConfiguration::ArchDefault()->num_double_registers() < 2) return;
+  if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->num_double_registers() < 2)
+    return;
 
 // TODO(titzer): mix in 64-bit types on all platforms when supported.
 #if V8_TARGET_ARCH_32_BIT
   static MachineType types[] = {
       kMachInt32,   kMachFloat32, kMachFloat64, kMachInt32,   kMachFloat64,
       kMachFloat32, kMachFloat32, kMachFloat64, kMachInt32,   kMachFloat32,
       kMachInt32,   kMachFloat64, kMachFloat64, kMachFloat32, kMachInt32,
       kMachFloat64, kMachInt32,   kMachFloat32};
 #else
   static MachineType types[] = {
       kMachInt32,   kMachInt64,   kMachFloat32, kMachFloat64, kMachInt32,
       kMachFloat64, kMachFloat32, kMachInt64,   kMachFloat64, kMachInt32,
       kMachFloat32, kMachInt32,   kMachFloat64, kMachFloat64, kMachInt64,
       kMachInt32,   kMachFloat64, kMachInt32,   kMachFloat32};
 #endif
 
   Isolate* isolate = CcTest::InitIsolateOnce();
 
   // Build machine signature
   MachineType* params = &types[start];
   const int num_params = static_cast<int>(arraysize(types) - start);
 
   // Build call descriptor
   int parray_gp[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0),
-      RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(1)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableGeneralCode(0),
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableGeneralCode(1)};
   int rarray_gp[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableGeneralCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableGeneralCode(0)};
   int parray_fp[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0),
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(1)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0),
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(1)};
   int rarray_fp[] = {
-      RegisterConfiguration::ArchDefault()->GetAllocatableDoubleCode(0)};
+      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+          ->GetAllocatableDoubleCode(0)};
   Allocator palloc(parray_gp, 2, parray_fp, 2);
   Allocator ralloc(rarray_gp, 1, rarray_fp, 1);
   RegisterConfig config(palloc, ralloc);
 
   for (int which = 0; which < num_params; which++) {
     Zone zone;
     HandleScope scope(isolate);
     MachineSignature::Builder builder(&zone, 1, num_params);
     builder.AddReturn(params[which]);
     for (int j = 0; j < num_params; j++) builder.AddParam(params[j]);
@@ skipping 72 matching lines @@
       }
     }
   }
 }
 
 
 TEST(MixedParams_0) { MixedParamTest(0); }
 TEST(MixedParams_1) { MixedParamTest(1); }
 TEST(MixedParams_2) { MixedParamTest(2); }
 TEST(MixedParams_3) { MixedParamTest(3); }