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Side by Side Diff: src/ppc/macro-assembler-ppc.cc

Issue 1405673003: provides a mechanism for optimizing compilers to select the different Register configuration. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Add the TODO comments. Created 5 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> // For assert 5 #include <assert.h> // For assert
6 #include <limits.h> // For LONG_MIN, LONG_MAX. 6 #include <limits.h> // For LONG_MIN, LONG_MAX.
7 7
8 #if V8_TARGET_ARCH_PPC 8 #if V8_TARGET_ARCH_PPC
9 9
10 #include "src/base/bits.h" 10 #include "src/base/bits.h"
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619 } 619 }
620 620
621 621
622 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) { 622 MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
623 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize); 623 return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
624 } 624 }
625 625
626 626
627 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) { 627 MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
628 // General purpose registers are pushed last on the stack. 628 // General purpose registers are pushed last on the stack.
629 const RegisterConfiguration* config = RegisterConfiguration::ArchDefault(); 629 const RegisterConfiguration* config =
630 RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT);
630 int doubles_size = config->num_allocatable_double_registers() * kDoubleSize; 631 int doubles_size = config->num_allocatable_double_registers() * kDoubleSize;
631 int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize; 632 int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize;
632 return MemOperand(sp, doubles_size + register_offset); 633 return MemOperand(sp, doubles_size + register_offset);
633 } 634 }
634 635
635 636
636 void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst, 637 void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst,
637 const DoubleRegister src) { 638 const DoubleRegister src) {
638 // Turn potential sNaN into qNaN. 639 // Turn potential sNaN into qNaN.
639 fsub(dst, src, kDoubleRegZero); 640 fsub(dst, src, kDoubleRegZero);
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4247 Register reg4, Register reg5, 4248 Register reg4, Register reg5,
4248 Register reg6) { 4249 Register reg6) {
4249 RegList regs = 0; 4250 RegList regs = 0;
4250 if (reg1.is_valid()) regs |= reg1.bit(); 4251 if (reg1.is_valid()) regs |= reg1.bit();
4251 if (reg2.is_valid()) regs |= reg2.bit(); 4252 if (reg2.is_valid()) regs |= reg2.bit();
4252 if (reg3.is_valid()) regs |= reg3.bit(); 4253 if (reg3.is_valid()) regs |= reg3.bit();
4253 if (reg4.is_valid()) regs |= reg4.bit(); 4254 if (reg4.is_valid()) regs |= reg4.bit();
4254 if (reg5.is_valid()) regs |= reg5.bit(); 4255 if (reg5.is_valid()) regs |= reg5.bit();
4255 if (reg6.is_valid()) regs |= reg6.bit(); 4256 if (reg6.is_valid()) regs |= reg6.bit();
4256 4257
4257 const RegisterConfiguration* config = RegisterConfiguration::ArchDefault(); 4258 const RegisterConfiguration* config =
4259 RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT);
4258 for (int i = 0; i < config->num_allocatable_general_registers(); ++i) { 4260 for (int i = 0; i < config->num_allocatable_general_registers(); ++i) {
4259 int code = config->GetAllocatableGeneralCode(i); 4261 int code = config->GetAllocatableGeneralCode(i);
4260 Register candidate = Register::from_code(code); 4262 Register candidate = Register::from_code(code);
4261 if (regs & candidate.bit()) continue; 4263 if (regs & candidate.bit()) continue;
4262 return candidate; 4264 return candidate;
4263 } 4265 }
4264 UNREACHABLE(); 4266 UNREACHABLE();
4265 return no_reg; 4267 return no_reg;
4266 } 4268 }
4267 4269
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4388 } 4390 }
4389 if (mag.shift > 0) srawi(result, result, mag.shift); 4391 if (mag.shift > 0) srawi(result, result, mag.shift);
4390 ExtractBit(r0, dividend, 31); 4392 ExtractBit(r0, dividend, 31);
4391 add(result, result, r0); 4393 add(result, result, r0);
4392 } 4394 }
4393 4395
4394 } // namespace internal 4396 } // namespace internal
4395 } // namespace v8 4397 } // namespace v8
4396 4398
4397 #endif // V8_TARGET_ARCH_PPC 4399 #endif // V8_TARGET_ARCH_PPC
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