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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/register-configuration.h" | 5 #include "src/register-configuration.h" |
| 6 #include "src/globals.h" | 6 #include "src/globals.h" |
| 7 #include "src/macro-assembler.h" | 7 #include "src/macro-assembler.h" |
| 8 | 8 |
| 9 namespace v8 { | 9 namespace v8 { |
| 10 namespace internal { | 10 namespace internal { |
| (...skipping 18 matching lines...) Expand all Loading... | |
| 29 #undef REGISTER_NAME | 29 #undef REGISTER_NAME |
| 30 }; | 30 }; |
| 31 | 31 |
| 32 STATIC_ASSERT(RegisterConfiguration::kMaxGeneralRegisters >= | 32 STATIC_ASSERT(RegisterConfiguration::kMaxGeneralRegisters >= |
| 33 Register::kNumRegisters); | 33 Register::kNumRegisters); |
| 34 STATIC_ASSERT(RegisterConfiguration::kMaxDoubleRegisters >= | 34 STATIC_ASSERT(RegisterConfiguration::kMaxDoubleRegisters >= |
| 35 DoubleRegister::kMaxNumRegisters); | 35 DoubleRegister::kMaxNumRegisters); |
| 36 | 36 |
| 37 class ArchDefaultRegisterConfiguration : public RegisterConfiguration { | 37 class ArchDefaultRegisterConfiguration : public RegisterConfiguration { |
| 38 public: | 38 public: |
| 39 ArchDefaultRegisterConfiguration() | 39 ArchDefaultRegisterConfiguration() |
|
danno
2015/10/16 08:47:02
If you pass the enum value mentioned elsewhere in
| |
| 40 : RegisterConfiguration( | 40 : RegisterConfiguration( |
| 41 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters, | 41 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters, |
| 42 #if V8_TARGET_ARCH_IA32 | 42 #if V8_TARGET_ARCH_IA32 |
| 43 kMaxAllocatableGeneralRegisterCount, | 43 kMaxAllocatableGeneralRegisterCount, |
| 44 kMaxAllocatableDoubleRegisterCount, | 44 kMaxAllocatableDoubleRegisterCount, |
| 45 kMaxAllocatableDoubleRegisterCount, | 45 kMaxAllocatableDoubleRegisterCount, |
| 46 #elif V8_TARGET_ARCH_X87 | 46 #elif V8_TARGET_ARCH_X87 |
| 47 kMaxAllocatableGeneralRegisterCount, | |
| 48 kMaxAllocatableDoubleRegisterCount, | |
| 49 kMaxAllocatableDoubleRegisterCount, | |
| 50 #elif V8_TARGET_ARCH_X64 | |
| 51 kMaxAllocatableGeneralRegisterCount, | |
| 52 kMaxAllocatableDoubleRegisterCount, | |
| 53 kMaxAllocatableDoubleRegisterCount, | |
| 54 #elif V8_TARGET_ARCH_ARM | |
| 55 FLAG_enable_embedded_constant_pool | |
| 56 ? (kMaxAllocatableGeneralRegisterCount - 1) | |
| 57 : kMaxAllocatableGeneralRegisterCount, | |
| 58 CpuFeatures::IsSupported(VFP32DREGS) | |
| 59 ? kMaxAllocatableDoubleRegisterCount | |
| 60 : (ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(REGISTER_COUNT)0), | |
| 61 ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(REGISTER_COUNT)0, | |
| 62 #elif V8_TARGET_ARCH_ARM64 | |
| 63 kMaxAllocatableGeneralRegisterCount, | |
| 64 kMaxAllocatableDoubleRegisterCount, | |
| 65 kMaxAllocatableDoubleRegisterCount, | |
| 66 #elif V8_TARGET_ARCH_MIPS | |
| 67 kMaxAllocatableGeneralRegisterCount, | |
| 68 kMaxAllocatableDoubleRegisterCount, | |
| 69 kMaxAllocatableDoubleRegisterCount, | |
| 70 #elif V8_TARGET_ARCH_MIPS64 | |
| 71 kMaxAllocatableGeneralRegisterCount, | |
| 72 kMaxAllocatableDoubleRegisterCount, | |
| 73 kMaxAllocatableDoubleRegisterCount, | |
| 74 #elif V8_TARGET_ARCH_PPC | |
| 75 kMaxAllocatableGeneralRegisterCount, | |
| 76 kMaxAllocatableDoubleRegisterCount, | |
| 77 kMaxAllocatableDoubleRegisterCount, | |
| 78 #else | |
| 79 GetAllocatableGeneralRegisterCount(), | |
| 80 GetAllocatableDoubleRegisterCount(), | |
| 81 GetAllocatableAliasedDoubleRegisterCount(), | |
| 82 #endif | |
| 83 GetAllocatableGeneralCodes(), GetAllocatableDoubleCodes(), | |
| 84 kGeneralRegisterNames, kDoubleRegisterNames) { | |
| 85 } | |
| 86 | |
| 87 const char* general_register_name_table_[Register::kNumRegisters]; | |
| 88 const char* double_register_name_table_[DoubleRegister::kMaxNumRegisters]; | |
| 89 | |
| 90 private: | |
| 91 static const int* GetAllocatableGeneralCodes() { | |
| 92 #define REGISTER_CODE(R) Register::kCode_##R, | |
| 93 static const int general_codes[] = { | |
| 94 ALLOCATABLE_GENERAL_REGISTERS(REGISTER_CODE)}; | |
| 95 #undef REGISTER_CODE | |
| 96 return general_codes; | |
| 97 } | |
| 98 | |
| 99 static const int* GetAllocatableDoubleCodes() { | |
| 100 #define REGISTER_CODE(R) DoubleRegister::kCode_##R, | |
| 101 static const int double_codes[] = { | |
| 102 ALLOCATABLE_DOUBLE_REGISTERS(REGISTER_CODE)}; | |
| 103 #undef REGISTER_CODE | |
| 104 return double_codes; | |
| 105 } | |
| 106 }; | |
| 107 | |
| 108 | |
| 109 class ArchDefaultRegisterConfigurationForTurbofan | |
| 110 : public RegisterConfiguration { | |
| 111 public: | |
| 112 ArchDefaultRegisterConfigurationForTurbofan() | |
| 113 : RegisterConfiguration( | |
| 114 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters, | |
| 115 #if V8_TARGET_ARCH_IA32 | |
| 116 kMaxAllocatableGeneralRegisterCount, | |
| 117 kMaxAllocatableDoubleRegisterCount, | |
| 118 kMaxAllocatableDoubleRegisterCount, | |
| 119 #elif V8_TARGET_ARCH_X87 | |
| 47 kMaxAllocatableGeneralRegisterCount, 1, 1, | 120 kMaxAllocatableGeneralRegisterCount, 1, 1, |
| 48 #elif V8_TARGET_ARCH_X64 | 121 #elif V8_TARGET_ARCH_X64 |
| 49 kMaxAllocatableGeneralRegisterCount, | 122 kMaxAllocatableGeneralRegisterCount, |
| 50 kMaxAllocatableDoubleRegisterCount, | 123 kMaxAllocatableDoubleRegisterCount, |
| 51 kMaxAllocatableDoubleRegisterCount, | 124 kMaxAllocatableDoubleRegisterCount, |
| 52 #elif V8_TARGET_ARCH_ARM | 125 #elif V8_TARGET_ARCH_ARM |
| 53 FLAG_enable_embedded_constant_pool | 126 FLAG_enable_embedded_constant_pool |
| 54 ? (kMaxAllocatableGeneralRegisterCount - 1) | 127 ? (kMaxAllocatableGeneralRegisterCount - 1) |
| 55 : kMaxAllocatableGeneralRegisterCount, | 128 : kMaxAllocatableGeneralRegisterCount, |
| 56 CpuFeatures::IsSupported(VFP32DREGS) | 129 CpuFeatures::IsSupported(VFP32DREGS) |
| (...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 100 ALLOCATABLE_DOUBLE_REGISTERS(REGISTER_CODE)}; | 173 ALLOCATABLE_DOUBLE_REGISTERS(REGISTER_CODE)}; |
| 101 #undef REGISTER_CODE | 174 #undef REGISTER_CODE |
| 102 return double_codes; | 175 return double_codes; |
| 103 } | 176 } |
| 104 }; | 177 }; |
| 105 | 178 |
| 106 | 179 |
| 107 static base::LazyInstance<ArchDefaultRegisterConfiguration>::type | 180 static base::LazyInstance<ArchDefaultRegisterConfiguration>::type |
| 108 kDefaultRegisterConfiguration = LAZY_INSTANCE_INITIALIZER; | 181 kDefaultRegisterConfiguration = LAZY_INSTANCE_INITIALIZER; |
| 109 | 182 |
| 183 static base::LazyInstance<ArchDefaultRegisterConfigurationForTurbofan>::type | |
| 184 kDefaultRegisterConfigurationForTurbo = LAZY_INSTANCE_INITIALIZER; | |
| 185 | |
| 110 } // namespace | 186 } // namespace |
| 111 | 187 |
| 112 | 188 |
| 113 const RegisterConfiguration* RegisterConfiguration::ArchDefault() { | 189 const RegisterConfiguration* RegisterConfiguration::ArchDefault() { |
| 114 return &kDefaultRegisterConfiguration.Get(); | 190 return &kDefaultRegisterConfiguration.Get(); |
| 115 } | 191 } |
| 116 | 192 |
| 193 | |
| 194 const RegisterConfiguration* RegisterConfiguration::ArchDefaultForTurbo() { | |
| 195 return &kDefaultRegisterConfiguration.Get(); | |
| 196 } | |
| 197 | |
| 198 | |
| 117 RegisterConfiguration::RegisterConfiguration( | 199 RegisterConfiguration::RegisterConfiguration( |
| 118 int num_general_registers, int num_double_registers, | 200 int num_general_registers, int num_double_registers, |
| 119 int num_allocatable_general_registers, int num_allocatable_double_registers, | 201 int num_allocatable_general_registers, int num_allocatable_double_registers, |
| 120 int num_allocatable_aliased_double_registers, | 202 int num_allocatable_aliased_double_registers, |
| 121 const int* allocatable_general_codes, const int* allocatable_double_codes, | 203 const int* allocatable_general_codes, const int* allocatable_double_codes, |
| 122 const char* const* general_register_names, | 204 const char* const* general_register_names, |
| 123 const char* const* double_register_names) | 205 const char* const* double_register_names) |
| 124 : num_general_registers_(num_general_registers), | 206 : num_general_registers_(num_general_registers), |
| 125 num_double_registers_(num_double_registers), | 207 num_double_registers_(num_double_registers), |
| 126 num_allocatable_general_registers_(num_allocatable_general_registers), | 208 num_allocatable_general_registers_(num_allocatable_general_registers), |
| (...skipping 11 matching lines...) Expand all Loading... | |
| 138 } | 220 } |
| 139 for (int i = 0; i < num_allocatable_double_registers_; ++i) { | 221 for (int i = 0; i < num_allocatable_double_registers_; ++i) { |
| 140 allocatable_double_codes_mask_ |= (1 << allocatable_double_codes_[i]); | 222 allocatable_double_codes_mask_ |= (1 << allocatable_double_codes_[i]); |
| 141 } | 223 } |
| 142 } | 224 } |
| 143 | 225 |
| 144 #undef REGISTER_COUNT | 226 #undef REGISTER_COUNT |
| 145 | 227 |
| 146 } // namespace internal | 228 } // namespace internal |
| 147 } // namespace v8 | 229 } // namespace v8 |
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