| Index: src/compiler/arm64/instruction-selector-arm64.cc
|
| diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc
|
| index 7a5b84275acd05008f13de95121235ee1b8f8f15..4abbc1e370fc662663b423a0eacd76bdb57c5d84 100644
|
| --- a/src/compiler/arm64/instruction-selector-arm64.cc
|
| +++ b/src/compiler/arm64/instruction-selector-arm64.cc
|
| @@ -37,6 +37,15 @@ class Arm64OperandGenerator final : public OperandGenerator {
|
| return UseRegister(node);
|
| }
|
|
|
| + // Use the zero register if the node has the immediate value zero, otherwise
|
| + // assign a register.
|
| + InstructionOperand UseRegisterOrImmediateZero(Node* node) {
|
| + if (IsIntegerConstant(node) && (GetIntegerConstantValue(node) == 0)) {
|
| + return UseImmediate(node);
|
| + }
|
| + return UseRegister(node);
|
| + }
|
| +
|
| // Use the provided node if it has the required value, or create a
|
| // TempImmediate otherwise.
|
| InstructionOperand UseImmediateOrTemp(Node* node, int32_t value) {
|
| @@ -247,18 +256,18 @@ void VisitBinop(InstructionSelector* selector, Node* node,
|
| } else if (TryMatchAnyShift(selector, node, right_node, &opcode,
|
| !is_add_sub)) {
|
| Matcher m_shift(right_node);
|
| - inputs[input_count++] = g.UseRegister(left_node);
|
| + inputs[input_count++] = g.UseRegisterOrImmediateZero(left_node);
|
| inputs[input_count++] = g.UseRegister(m_shift.left().node());
|
| inputs[input_count++] = g.UseImmediate(m_shift.right().node());
|
| } else if (can_commute && TryMatchAnyShift(selector, node, left_node, &opcode,
|
| !is_add_sub)) {
|
| if (is_cmp) cont->Commute();
|
| Matcher m_shift(left_node);
|
| - inputs[input_count++] = g.UseRegister(right_node);
|
| + inputs[input_count++] = g.UseRegisterOrImmediateZero(right_node);
|
| inputs[input_count++] = g.UseRegister(m_shift.left().node());
|
| inputs[input_count++] = g.UseImmediate(m_shift.right().node());
|
| } else {
|
| - inputs[input_count++] = g.UseRegister(left_node);
|
| + inputs[input_count++] = g.UseRegisterOrImmediateZero(left_node);
|
| inputs[input_count++] = g.UseRegister(right_node);
|
| }
|
|
|
| @@ -997,12 +1006,7 @@ void InstructionSelector::VisitInt32Sub(Node* node) {
|
| }
|
| }
|
|
|
| - if (m.left().Is(0)) {
|
| - Emit(kArm64Neg32, g.DefineAsRegister(node),
|
| - g.UseRegister(m.right().node()));
|
| - } else {
|
| - VisitAddSub<Int32BinopMatcher>(this, node, kArm64Sub32, kArm64Add32);
|
| - }
|
| + VisitAddSub<Int32BinopMatcher>(this, node, kArm64Sub32, kArm64Add32);
|
| }
|
|
|
|
|
| @@ -1023,11 +1027,7 @@ void InstructionSelector::VisitInt64Sub(Node* node) {
|
| }
|
| }
|
|
|
| - if (m.left().Is(0)) {
|
| - Emit(kArm64Neg, g.DefineAsRegister(node), g.UseRegister(m.right().node()));
|
| - } else {
|
| - VisitAddSub<Int64BinopMatcher>(this, node, kArm64Sub, kArm64Add);
|
| - }
|
| + VisitAddSub<Int64BinopMatcher>(this, node, kArm64Sub, kArm64Add);
|
| }
|
|
|
|
|
|
|