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Side by Side Diff: src/compiler/arm64/instruction-codes-arm64.h

Issue 1404093003: [turbofan] Negate with shifted input for ARM64 (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
48 V(Arm64Idiv) \ 48 V(Arm64Idiv) \
49 V(Arm64Idiv32) \ 49 V(Arm64Idiv32) \
50 V(Arm64Udiv) \ 50 V(Arm64Udiv) \
51 V(Arm64Udiv32) \ 51 V(Arm64Udiv32) \
52 V(Arm64Imod) \ 52 V(Arm64Imod) \
53 V(Arm64Imod32) \ 53 V(Arm64Imod32) \
54 V(Arm64Umod) \ 54 V(Arm64Umod) \
55 V(Arm64Umod32) \ 55 V(Arm64Umod32) \
56 V(Arm64Not) \ 56 V(Arm64Not) \
57 V(Arm64Not32) \ 57 V(Arm64Not32) \
58 V(Arm64Neg) \
59 V(Arm64Neg32) \
60 V(Arm64Lsl) \ 58 V(Arm64Lsl) \
61 V(Arm64Lsl32) \ 59 V(Arm64Lsl32) \
62 V(Arm64Lsr) \ 60 V(Arm64Lsr) \
63 V(Arm64Lsr32) \ 61 V(Arm64Lsr32) \
64 V(Arm64Asr) \ 62 V(Arm64Asr) \
65 V(Arm64Asr32) \ 63 V(Arm64Asr32) \
66 V(Arm64Ror) \ 64 V(Arm64Ror) \
67 V(Arm64Ror32) \ 65 V(Arm64Ror32) \
68 V(Arm64Mov32) \ 66 V(Arm64Mov32) \
69 V(Arm64Sxtb32) \ 67 V(Arm64Sxtb32) \
(...skipping 86 matching lines...) Expand 10 before | Expand all | Expand 10 after
156 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \ 154 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \
157 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ \ 155 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ \
158 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \ 156 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \
159 V(Operand2_R_SXTH) /* %r0 SXTH (signed extend halfword) */ 157 V(Operand2_R_SXTH) /* %r0 SXTH (signed extend halfword) */
160 158
161 } // namespace compiler 159 } // namespace compiler
162 } // namespace internal 160 } // namespace internal
163 } // namespace v8 161 } // namespace v8
164 162
165 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 163 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
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