Start incorporating the ARM integrated assembler.

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 19 matching lines @@
 #include "IceUtils.h"
 #include "llvm/Support/MathExtras.h"
 
 #include <algorithm>
 #include <utility>
 
 namespace Ice {
 
 namespace {
 
-// UnimplementedError is defined as a macro so that we can get actual line
-// numbers.
-#define UnimplementedError(Flags)                                              \
-  do {                                                                         \
-    if (!static_cast<const ClFlags &>(Flags).getSkipUnimplemented()) {         \
-      /* Use llvm_unreachable instead of report_fatal_error, which gives       \
-         better stack traces. */                                               \
-      llvm_unreachable("Not yet implemented");                                 \
-      abort();                                                                 \
-    }                                                                          \
-  } while (0)
-
 // The following table summarizes the logic for lowering the icmp instruction
 // for i32 and narrower types. Each icmp condition has a clear mapping to an
 // ARM32 conditional move instruction.
 
 const struct TableIcmp32_ {
   CondARM32::Cond Mapping;
 } TableIcmp32[] = {
 #define X(val, is_signed, swapped64, C_32, C1_64, C2_64)                       \
   { CondARM32::C_32 }                                                          \
   ,
@@ skipping 3802 matching lines @@
 }
 } // end of anonymous namespace
 
 void TargetDataARM32::lowerConstants() {
   if (Ctx->getFlags().getDisableTranslation())
     return;
   switch (Ctx->getFlags().getOutFileType()) {
   case FT_Elf:
     UnimplementedError(Ctx->getFlags());
     break;
-  case FT_Asm: {
+  case FT_Asm:
+  case FT_Iasm: {
     OstreamLocker L(Ctx);
     emitConstantPool<float>(Ctx);
     emitConstantPool<double>(Ctx);
     break;
   }
-  case FT_Iasm: {
-    UnimplementedError(Ctx->getFlags());
-    break;
-  }
   }
 }
 
 void TargetDataARM32::lowerJumpTables() {
   if (Ctx->getFlags().getDisableTranslation())
     return;
   switch (Ctx->getFlags().getOutFileType()) {
   case FT_Elf:
     UnimplementedError(Ctx->getFlags());
     break;
   case FT_Asm:
     // Already emitted from Cfg
     break;
   case FT_Iasm: {
-    UnimplementedError(Ctx->getFlags());
+    // TODO(kschimpf): Fill this in when we get more information.
     break;
   }
   }
 }
 
 TargetHeaderARM32::TargetHeaderARM32(GlobalContext *Ctx)
     : TargetHeaderLowering(Ctx), CPUFeatures(Ctx->getFlags()) {}
 
 void TargetHeaderARM32::lower() {
   OstreamLocker L(Ctx);
@@ skipping 35 matching lines @@
       << ".eabi_attribute 68, 1   @ Tag_Virtualization_use\n";
   if (CPUFeatures.hasFeature(TargetARM32Features::HWDivArm)) {
     Str << ".eabi_attribute 44, 2   @ Tag_DIV_use\n";
   }
   // Technically R9 is used for TLS with Sandboxing, and we reserve it.
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 } // end of namespace Ice