| Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll
|
| diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
|
| index 3807ba4c5b27387a62133cdfa280f1a7eed62ed2..5a397e9c69db6282decc0fd7660ddf0541ef6796 100644
|
| --- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll
|
| +++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
|
| @@ -517,7 +517,7 @@ entry:
|
| ; ARM32: orr r0, [[T0]], r1, lsl [[T1]]
|
| ; ARM32: sub [[T2:r[0-9]+]], r2, #32
|
| ; ARM32: cmp [[T2]], #0
|
| -; ARM32: asrge r0, r1, [[T2]]
|
| +; ARM32: asrge r0, r1, [[T2]]
|
| ; ARM32: asr r{{[0-9]+}}, r1, r2
|
|
|
| define internal i32 @shr64BitSignedTrunc(i64 %a, i64 %b) {
|
|
|