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Issue 1396923002: Subzero: Remove trailing whitespace. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 2 months ago
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1 //===- subzero/src/IceInstX8632.def - X-macros for x86-32 insts -*- C++ -*-===// 1 //===- subzero/src/IceInstX8632.def - X-macros for x86-32 insts -*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines properties of lowered x86-32 instructions in the 10 // This file defines properties of lowered x86-32 instructions in the
11 // form of x-macros. 11 // form of x-macros.
12 // 12 //
13 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
14 14
15 #ifndef SUBZERO_SRC_ICEINSTX8632_DEF 15 #ifndef SUBZERO_SRC_ICEINSTX8632_DEF
16 #define SUBZERO_SRC_ICEINSTX8632_DEF 16 #define SUBZERO_SRC_ICEINSTX8632_DEF
17 17
18 // NOTE: esp is not considered isInt, to avoid register allocating it. 18 // NOTE: esp is not considered isInt, to avoid register allocating it.
19 #define REGX8632_GPR_TABLE \ 19 #define REGX8632_GPR_TABLE \
20 /* val, encode, name, name16, name8, scratch, preserved, stackptr, \ 20 /* val, encode, name, name16, name8, scratch, preserved, stackptr, \
21 frameptr, isI8, isInt, isFP */ \ 21 frameptr, isI8, isInt, isFP */ \
22 X(Reg_eax, 0, "eax", "ax", "al", 1, 0, 0, 0, 1, 1, 0) \ 22 X(Reg_eax, 0, "eax", "ax", "al", 1, 0, 0, 0, 1, 1, 0) \
23 X(Reg_ecx, 1, "ecx", "cx", "cl", 1, 0, 0, 0, 1, 1, 0) \ 23 X(Reg_ecx, 1, "ecx", "cx", "cl", 1, 0, 0, 0, 1, 1, 0) \
24 X(Reg_edx, 2, "edx", "dx", "dl", 1, 0, 0, 0, 1, 1, 0) \ 24 X(Reg_edx, 2, "edx", "dx", "dl", 1, 0, 0, 0, 1, 1, 0) \
25 X(Reg_ebx, 3, "ebx", "bx", "bl", 0, 1, 0, 0, 1, 1, 0) \ 25 X(Reg_ebx, 3, "ebx", "bx", "bl", 0, 1, 0, 0, 1, 1, 0) \
26 X(Reg_esp, 4, "esp", "sp", "" , 0, 0, 1, 0, 0, 0, 0) \ 26 X(Reg_esp, 4, "esp", "sp", "" , 0, 0, 1, 0, 0, 0, 0) \
27 X(Reg_ebp, 5, "ebp", "bp", "" , 0, 1, 0, 1, 0, 1, 0) \ 27 X(Reg_ebp, 5, "ebp", "bp", "" , 0, 1, 0, 1, 0, 1, 0) \
28 X(Reg_esi, 6, "esi", "si", "" , 0, 1, 0, 0, 0, 1, 0) \ 28 X(Reg_esi, 6, "esi", "si", "" , 0, 1, 0, 0, 0, 1, 0) \
29 X(Reg_edi, 7, "edi", "di", "" , 0, 1, 0, 0, 0, 1, 0) 29 X(Reg_edi, 7, "edi", "di", "" , 0, 1, 0, 0, 0, 1, 0)
30 30
31 #define REGX8632_XMM_TABLE \ 31 #define REGX8632_XMM_TABLE \
32 X(Reg_xmm0, 0, "xmm0", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 32 X(Reg_xmm0, 0, "xmm0", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
33 X(Reg_xmm1, 1, "xmm1", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 33 X(Reg_xmm1, 1, "xmm1", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
34 X(Reg_xmm2, 2, "xmm2", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 34 X(Reg_xmm2, 2, "xmm2", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
35 X(Reg_xmm3, 3, "xmm3", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 35 X(Reg_xmm3, 3, "xmm3", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
36 X(Reg_xmm4, 4, "xmm4", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 36 X(Reg_xmm4, 4, "xmm4", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
37 X(Reg_xmm5, 5, "xmm5", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 37 X(Reg_xmm5, 5, "xmm5", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
38 X(Reg_xmm6, 6, "xmm6", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 38 X(Reg_xmm6, 6, "xmm6", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
39 X(Reg_xmm7, 7, "xmm7", "" , "" , 1, 0, 0, 0, 0, 0, 1) \ 39 X(Reg_xmm7, 7, "xmm7", "" , "" , 1, 0, 0, 0, 0, 0, 1) \
(...skipping 101 matching lines...) Expand 10 before | Expand all | Expand 10 after
141 X(IceType_v4i1, IceType_i32 , "?" , "" , "d", "", "") \ 141 X(IceType_v4i1, IceType_i32 , "?" , "" , "d", "", "") \
142 X(IceType_v8i1, IceType_i16 , "?" , "" , "w", "", "") \ 142 X(IceType_v8i1, IceType_i16 , "?" , "" , "w", "", "") \
143 X(IceType_v16i1, IceType_i8 , "?" , "" , "b", "", "") \ 143 X(IceType_v16i1, IceType_i8 , "?" , "" , "b", "", "") \
144 X(IceType_v16i8, IceType_i8 , "?" , "" , "b", "", "") \ 144 X(IceType_v16i8, IceType_i8 , "?" , "" , "b", "", "") \
145 X(IceType_v8i16, IceType_i16 , "?" , "" , "w", "", "") \ 145 X(IceType_v8i16, IceType_i16 , "?" , "" , "w", "", "") \
146 X(IceType_v4i32, IceType_i32 , "dq", "" , "d", "", "") \ 146 X(IceType_v4i32, IceType_i32 , "dq", "" , "d", "", "") \
147 X(IceType_v4f32, IceType_f32 , "ps", "" , "d", "", "") \ 147 X(IceType_v4f32, IceType_f32 , "ps", "" , "d", "", "") \
148 //#define X(tag, elementty, cvt, sdss, pack, width, fld) 148 //#define X(tag, elementty, cvt, sdss, pack, width, fld)
149 149
150 #endif // SUBZERO_SRC_ICEINSTX8632_DEF 150 #endif // SUBZERO_SRC_ICEINSTX8632_DEF
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