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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #if V8_TARGET_ARCH_X64 | 5 #if V8_TARGET_ARCH_X64 |
| 6 | 6 |
| 7 #include "src/base/bits.h" | 7 #include "src/base/bits.h" |
| 8 #include "src/base/division-by-constant.h" | 8 #include "src/base/division-by-constant.h" |
| 9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
| 10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
| (...skipping 770 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 781 for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) { | 781 for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) { |
| 782 Register reg = saved_regs[i]; | 782 Register reg = saved_regs[i]; |
| 783 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) { | 783 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) { |
| 784 popq(reg); | 784 popq(reg); |
| 785 } | 785 } |
| 786 } | 786 } |
| 787 } | 787 } |
| 788 | 788 |
| 789 | 789 |
| 790 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, Register src) { | 790 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, Register src) { |
| 791 if (CpuFeatures::IsSupported(AVX)) { | 791 xorps(dst, dst); |
| 792 CpuFeatureScope scope(this, AVX); | 792 cvtlsi2sd(dst, src); |
| 793 vxorpd(dst, dst, dst); | |
| 794 vcvtlsi2sd(dst, dst, src); | |
| 795 } else { | |
| 796 xorps(dst, dst); | |
| 797 cvtlsi2sd(dst, src); | |
| 798 } | |
| 799 } | 793 } |
| 800 | 794 |
| 801 | 795 |
| 802 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, const Operand& src) { | 796 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, const Operand& src) { |
| 803 if (CpuFeatures::IsSupported(AVX)) { | 797 xorps(dst, dst); |
| 804 CpuFeatureScope scope(this, AVX); | 798 cvtlsi2sd(dst, src); |
| 805 vxorpd(dst, dst, dst); | |
| 806 vcvtlsi2sd(dst, dst, src); | |
| 807 } else { | |
| 808 xorps(dst, dst); | |
| 809 cvtlsi2sd(dst, src); | |
| 810 } | |
| 811 } | 799 } |
| 812 | 800 |
| 813 | 801 |
| 814 void MacroAssembler::Load(Register dst, const Operand& src, Representation r) { | 802 void MacroAssembler::Load(Register dst, const Operand& src, Representation r) { |
| 815 DCHECK(!r.IsDouble()); | 803 DCHECK(!r.IsDouble()); |
| 816 if (r.IsInteger8()) { | 804 if (r.IsInteger8()) { |
| 817 movsxbq(dst, src); | 805 movsxbq(dst, src); |
| 818 } else if (r.IsUInteger8()) { | 806 } else if (r.IsUInteger8()) { |
| 819 movzxbl(dst, src); | 807 movzxbl(dst, src); |
| 820 } else if (r.IsInteger16()) { | 808 } else if (r.IsInteger16()) { |
| (...skipping 4232 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 5053 movl(rax, dividend); | 5041 movl(rax, dividend); |
| 5054 shrl(rax, Immediate(31)); | 5042 shrl(rax, Immediate(31)); |
| 5055 addl(rdx, rax); | 5043 addl(rdx, rax); |
| 5056 } | 5044 } |
| 5057 | 5045 |
| 5058 | 5046 |
| 5059 } // namespace internal | 5047 } // namespace internal |
| 5060 } // namespace v8 | 5048 } // namespace v8 |
| 5061 | 5049 |
| 5062 #endif // V8_TARGET_ARCH_X64 | 5050 #endif // V8_TARGET_ARCH_X64 |
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