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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
8 // on regular desktop machines. | 8 // on regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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308 // Called from DecodeTypeRegisterCOP1. | 308 // Called from DecodeTypeRegisterCOP1. |
309 void DecodeTypeRegisterSRsType(); | 309 void DecodeTypeRegisterSRsType(); |
310 | 310 |
311 void DecodeTypeRegisterDRsType(); | 311 void DecodeTypeRegisterDRsType(); |
312 | 312 |
313 void DecodeTypeRegisterWRsType(); | 313 void DecodeTypeRegisterWRsType(); |
314 | 314 |
315 void DecodeTypeRegisterLRsType(); | 315 void DecodeTypeRegisterLRsType(); |
316 | 316 |
317 Instruction* currentInstr_; | 317 Instruction* currentInstr_; |
| 318 |
318 inline Instruction* get_instr() const { return currentInstr_; } | 319 inline Instruction* get_instr() const { return currentInstr_; } |
319 inline void set_instr(Instruction* instr) { currentInstr_ = instr; } | 320 inline void set_instr(Instruction* instr) { currentInstr_ = instr; } |
320 | 321 |
321 inline int32_t rs_reg() const { return currentInstr_->RsValue(); } | 322 inline int32_t rs_reg() const { return currentInstr_->RsValue(); } |
322 inline int32_t rs() const { return get_register(rs_reg()); } | 323 inline int32_t rs() const { return get_register(rs_reg()); } |
323 inline uint32_t rs_u() const { | 324 inline uint32_t rs_u() const { |
324 return static_cast<uint32_t>(get_register(rs_reg())); | 325 return static_cast<uint32_t>(get_register(rs_reg())); |
325 } | 326 } |
326 inline int32_t rt_reg() const { return currentInstr_->RtValue(); } | 327 inline int32_t rt_reg() const { return currentInstr_->RtValue(); } |
327 inline int32_t rt() const { return get_register(rt_reg()); } | 328 inline int32_t rt() const { return get_register(rt_reg()); } |
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339 set_register(rd_reg, alu_out); | 340 set_register(rd_reg, alu_out); |
340 TraceRegWr(alu_out); | 341 TraceRegWr(alu_out); |
341 } | 342 } |
342 | 343 |
343 void DecodeTypeImmediate(Instruction* instr); | 344 void DecodeTypeImmediate(Instruction* instr); |
344 void DecodeTypeJump(Instruction* instr); | 345 void DecodeTypeJump(Instruction* instr); |
345 | 346 |
346 // Used for breakpoints and traps. | 347 // Used for breakpoints and traps. |
347 void SoftwareInterrupt(Instruction* instr); | 348 void SoftwareInterrupt(Instruction* instr); |
348 | 349 |
| 350 // Compact branch guard. |
| 351 void CheckForbiddenSlot(int32_t current_pc) { |
| 352 Instruction* instr_aftter_compact_branch = |
| 353 reinterpret_cast<Instruction*>(current_pc + Instruction::kInstrSize); |
| 354 if (instr_aftter_compact_branch->IsForbiddenInBranchDelay()) { |
| 355 V8_Fatal(__FILE__, __LINE__, |
| 356 "Error: Unexpected instruction 0x%08x immediately after a " |
| 357 "compact branch instruction.", |
| 358 *reinterpret_cast<uint32_t*>(instr_aftter_compact_branch)); |
| 359 } |
| 360 } |
| 361 |
349 // Stop helper functions. | 362 // Stop helper functions. |
350 bool IsWatchpoint(uint32_t code); | 363 bool IsWatchpoint(uint32_t code); |
351 void PrintWatchpoint(uint32_t code); | 364 void PrintWatchpoint(uint32_t code); |
352 void HandleStop(uint32_t code, Instruction* instr); | 365 void HandleStop(uint32_t code, Instruction* instr); |
353 bool IsStopInstruction(Instruction* instr); | 366 bool IsStopInstruction(Instruction* instr); |
354 bool IsEnabledStop(uint32_t code); | 367 bool IsEnabledStop(uint32_t code); |
355 void EnableStop(uint32_t code); | 368 void EnableStop(uint32_t code); |
356 void DisableStop(uint32_t code); | 369 void DisableStop(uint32_t code); |
357 void IncreaseStopCounter(uint32_t code); | 370 void IncreaseStopCounter(uint32_t code); |
358 void PrintStopInfo(uint32_t code); | 371 void PrintStopInfo(uint32_t code); |
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479 static inline void UnregisterCTryCatch() { | 492 static inline void UnregisterCTryCatch() { |
480 Simulator::current(Isolate::Current())->PopAddress(); | 493 Simulator::current(Isolate::Current())->PopAddress(); |
481 } | 494 } |
482 }; | 495 }; |
483 | 496 |
484 } // namespace internal | 497 } // namespace internal |
485 } // namespace v8 | 498 } // namespace v8 |
486 | 499 |
487 #endif // !defined(USE_SIMULATOR) | 500 #endif // !defined(USE_SIMULATOR) |
488 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 501 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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