MIPS: r6 compact branch optimization.

src/mips/constants-mips.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #if V8_TARGET_ARCH_MIPS
 
 #include "src/mips/constants-mips.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 109 matching lines @@
 
   // No Cregister with the reguested name found.
   return kInvalidFPURegister;
 }
 
 
 // -----------------------------------------------------------------------------
 // Instructions.
 
 bool Instruction::IsForbiddenInBranchDelay() const {
-  const int op = OpcodeFieldRaw();
-  switch (op) {
+  switch (OpcodeFieldRaw()) {
     case J:
     case JAL:
     case BEQ:
     case BNE:
-    case BLEZ:
-    case BGTZ:
+    case BLEZ:  // POP06
+    case BGTZ:  // POP07
     case BEQL:
     case BNEL:
-    case BLEZL:
-    case BGTZL:
+    case BLEZL:  // POP26
+    case BGTZL:  // POP27
     case BC:
     case BALC:
+    case POP10:
+    case POP30:
+    case POP66:
+    case POP76:
       return true;
     case REGIMM:
       switch (RtFieldRaw()) {
         case BLTZ:
         case BGEZ:
         case BLTZAL:
         case BGEZAL:
           return true;
         default:
           return false;
       }
       break;
     case SPECIAL:
       switch (FunctionFieldRaw()) {
         case JR:
         case JALR:
           return true;
         default:
           return false;
       }
       break;
     default:
       return false;
   }
 }
 
 
 bool Instruction::IsLinkingInstruction() const {
-  const int op = OpcodeFieldRaw();
-  switch (op) {
+  switch (OpcodeFieldRaw()) {
     case JAL:
       return true;
     case POP76:
       if (RsFieldRawNoAssert() == JIALC)
         return true;  // JIALC
       else
         return false;  // BNEZC
     case REGIMM:
       switch (RtFieldRaw()) {
         case BGEZAL:
@@ skipping 32 matching lines @@
         return false;
     }
   }
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_MIPS