Create a proper target machine for PNaCl.

lib/Target/PNaCl/PNaClTargetMachine.cpp

Index: lib/Target/PNaCl/PNaClTargetMachine.cpp
diff --git a/lib/Target/PNaCl/PNaClTargetMachine.cpp b/lib/Target/PNaCl/PNaClTargetMachine.cpp
new file mode 100644
index 0000000000000000000000000000000000000000..9e0e380420f03ae3f08c1b6635b2d9a6e3e1e629
--- /dev/null
+++ b/lib/Target/PNaCl/PNaClTargetMachine.cpp
@@ -0,0 +1,66 @@
+//===-- llvm/Target/PNaCl/PNaClTargetMachine.cpp - Target Information -*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the TargetMachine class specific to PNaCl.
+//
+//===----------------------------------------------------------------------===//
+
+#include "PNaClTargetMachine.h"
+#include "TargetInfo/PNaClTargetInfo.h"
+
+#include "llvm/Bitcode/BitcodeWriterPass.h"
+#include "llvm/IR/IRPrintingPasses.h"
+#include "llvm/IR/LegacyPassManager.h"
+#include "llvm/Support/TargetRegistry.h"
+
+using namespace llvm;
+
+extern "C" void LLVMInitializePNaClTarget() {
+  RegisterTargetMachine<PNaClTargetMachine> X(PNaClLe32_Target);
+}
+
+static const char* Datalayout = "e-p:32:32-i64:64-n32";
+
+llvm::PNaClTargetMachine::PNaClTargetMachine(const Target& T, StringRef TT,
+                                             StringRef CPU, StringRef FS,
+                                             const TargetOptions &Options,
+                                             Reloc::Model RM,
+                                             CodeModel::Model CM,
+                                             CodeGenOpt::Level OL)
+  : TargetMachine(T, Datalayout, TT, CPU, FS, Options)
+{
+  (void)RM; (void)CM; (void)OL;
+}
+
+llvm::PNaClTargetMachine::~PNaClTargetMachine() {
+}
+
+bool llvm::PNaClTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
+                                                   raw_pwrite_stream &Out,
+                                                   CodeGenFileType FType,
+                                                   bool DisableVerify,
+                                                   AnalysisID StartAfter,
+                                                   AnalysisID StopAfter) {
+  (void)DisableVerify;
+  (void)StartAfter;
+  (void)StopAfter;
+
+  switch(FType) {
+  case CGFT_ObjectFile:
+    PM.add(createBitcodeWriterPass(Out));
+    break;
+  case CGFT_AssemblyFile:
+    PM.add(createPrintModulePass(Out));
+    break;
+  case CGFT_Null:
+    return true;
+  }
+
+  return false;
+}