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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// | 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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2040 // t1=movzx src; dst.lo=t1; dst.hi=0 | 2040 // t1=movzx src; dst.lo=t1; dst.hi=0 |
2041 Constant *Zero = Ctx->getConstantZero(IceType_i32); | 2041 Constant *Zero = Ctx->getConstantZero(IceType_i32); |
2042 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); | 2042 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); |
2043 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); | 2043 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
2044 Variable *Tmp = makeReg(DestLo->getType()); | 2044 Variable *Tmp = makeReg(DestLo->getType()); |
2045 if (Src0RM->getType() == IceType_i32) { | 2045 if (Src0RM->getType() == IceType_i32) { |
2046 _mov(Tmp, Src0RM); | 2046 _mov(Tmp, Src0RM); |
2047 } else { | 2047 } else { |
2048 _movzx(Tmp, Src0RM); | 2048 _movzx(Tmp, Src0RM); |
2049 } | 2049 } |
2050 if (Src0RM->getType() == IceType_i1) { | |
John
2015/10/09 12:14:08
are you 100% sure this is OK? I've wondered about
Jim Stichnoth
2015/10/09 13:50:22
I'm about 99.44% sure...
The idea is to look thro
| |
2051 Constant *One = Ctx->getConstantInt32(1); | |
2052 _and(Tmp, One); | |
2053 } | |
2054 _mov(DestLo, Tmp); | 2050 _mov(DestLo, Tmp); |
2055 _mov(DestHi, Zero); | 2051 _mov(DestHi, Zero); |
2056 } else if (Src0RM->getType() == IceType_i1) { | 2052 } else if (Src0RM->getType() == IceType_i1) { |
2057 // t = Src0RM; t &= 1; Dest = t | 2053 // t = Src0RM; Dest = t |
2058 Constant *One = Ctx->getConstantInt32(1); | |
2059 Type DestTy = Dest->getType(); | 2054 Type DestTy = Dest->getType(); |
2060 Variable *T = nullptr; | 2055 Variable *T = nullptr; |
2061 if (DestTy == IceType_i8) { | 2056 if (DestTy == IceType_i8) { |
2062 _mov(T, Src0RM); | 2057 _mov(T, Src0RM); |
2063 } else { | 2058 } else { |
2064 assert(DestTy != IceType_i1); | 2059 assert(DestTy != IceType_i1); |
2065 assert(Traits::Is64Bit || DestTy != IceType_i64); | 2060 assert(Traits::Is64Bit || DestTy != IceType_i64); |
2066 // Use 32-bit for both 16-bit and 32-bit, since 32-bit ops are shorter. | 2061 // Use 32-bit for both 16-bit and 32-bit, since 32-bit ops are shorter. |
2067 // In x86-64 we need to widen T to 64-bits to ensure that T -- if | 2062 // In x86-64 we need to widen T to 64-bits to ensure that T -- if |
2068 // written to the stack (i.e., in -Om1) will be fully zero-extended. | 2063 // written to the stack (i.e., in -Om1) will be fully zero-extended. |
2069 T = makeReg(DestTy == IceType_i64 ? IceType_i64 : IceType_i32); | 2064 T = makeReg(DestTy == IceType_i64 ? IceType_i64 : IceType_i32); |
2070 _movzx(T, Src0RM); | 2065 _movzx(T, Src0RM); |
2071 } | 2066 } |
2072 _and(T, One); | |
2073 _mov(Dest, T); | 2067 _mov(Dest, T); |
2074 } else { | 2068 } else { |
2075 // t1 = movzx src; dst = t1 | 2069 // t1 = movzx src; dst = t1 |
2076 Variable *T = makeReg(Dest->getType()); | 2070 Variable *T = makeReg(Dest->getType()); |
2077 _movzx(T, Src0RM); | 2071 _movzx(T, Src0RM); |
2078 _mov(Dest, T); | 2072 _mov(Dest, T); |
2079 } | 2073 } |
2080 break; | 2074 break; |
2081 } | 2075 } |
2082 case InstCast::Trunc: { | 2076 case InstCast::Trunc: { |
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5515 } | 5509 } |
5516 // the offset is not eligible for blinding or pooling, return the original | 5510 // the offset is not eligible for blinding or pooling, return the original |
5517 // mem operand | 5511 // mem operand |
5518 return MemOperand; | 5512 return MemOperand; |
5519 } | 5513 } |
5520 | 5514 |
5521 } // end of namespace X86Internal | 5515 } // end of namespace X86Internal |
5522 } // end of namespace Ice | 5516 } // end of namespace Ice |
5523 | 5517 |
5524 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H | 5518 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H |
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