Inline Float32x4 constructors

runtime/vm/intermediate_language_x64.cc

Index: runtime/vm/intermediate_language_x64.cc
diff --git a/runtime/vm/intermediate_language_x64.cc b/runtime/vm/intermediate_language_x64.cc
index 7e22db3fc614a1833a70741d73973f090ac5d592..e2747bbdfd5f3b1f85470f1b9047746fcabb3ed7 100644
--- a/runtime/vm/intermediate_language_x64.cc
+++ b/runtime/vm/intermediate_language_x64.cc
@@ -2910,6 +2910,79 @@ void Float32x4ShuffleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
 }
 
 
+LocationSummary* Float32x4ConstructorInstr::MakeLocationSummary() const {
+  const intptr_t kNumInputs = 4;
+  const intptr_t kNumTemps = 0;
+  LocationSummary* summary =
+      new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
+  summary->set_in(0, Location::RequiresFpuRegister());
+  summary->set_in(1, Location::RequiresFpuRegister());
+  summary->set_in(2, Location::RequiresFpuRegister());
+  summary->set_in(3, Location::RequiresFpuRegister());
+  summary->set_out(Location::SameAsFirstInput());
+  return summary;
+}
+
+
+void Float32x4ConstructorInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  XmmRegister v0 = locs()->in(0).fpu_reg();
+  XmmRegister v1 = locs()->in(1).fpu_reg();
+  XmmRegister v2 = locs()->in(2).fpu_reg();
+  XmmRegister v3 = locs()->in(3).fpu_reg();
+  ASSERT(v0 == locs()->out().fpu_reg());
+  __ subq(RSP, Immediate(16));
+  __ cvtsd2ss(v0, v0);
+  __ movss(Address(RSP, -16), v0);
+  __ movsd(v0, v1);
+  __ cvtsd2ss(v0, v0);
+  __ movss(Address(RSP, -12), v0);
+  __ movsd(v0, v2);
+  __ cvtsd2ss(v0, v0);
+  __ movss(Address(RSP, -8), v0);
+  __ movsd(v0, v3);
+  __ cvtsd2ss(v0, v0);
+  __ movss(Address(RSP, -4), v0);
+  __ movups(v0, Address(RSP, -16));
+  __ addq(RSP, Immediate(16));
+}
+
+
+LocationSummary* Float32x4ZeroInstr::MakeLocationSummary() const {
+  const intptr_t kNumInputs = 0;
+  const intptr_t kNumTemps = 0;
+  LocationSummary* summary =
+      new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
+  summary->set_out(Location::RequiresFpuRegister());
+  return summary;
+}
+
+
+void Float32x4ZeroInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  XmmRegister value = locs()->out().fpu_reg();
+  __ xorps(value, value);
+}
+
+
+LocationSummary* Float32x4SplatInstr::MakeLocationSummary() const {
+  const intptr_t kNumInputs = 1;
+  const intptr_t kNumTemps = 0;
+  LocationSummary* summary =
+      new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
+  summary->set_in(0, Location::RequiresFpuRegister());
+  summary->set_out(Location::SameAsFirstInput());
+  return summary;
+}
+
+
+void Float32x4SplatInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  XmmRegister value = locs()->out().fpu_reg();
+  // Convert to Float32.
+  __ cvtsd2ss(value, value);
+  // Splat across all lanes.
+  __ shufps(value, value, Immediate(0x00));
+}
+
+
 LocationSummary* MathSqrtInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;