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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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860 char* cache_valid_byte = cache_page->ValidityByte(offset); | 860 char* cache_valid_byte = cache_page->ValidityByte(offset); |
861 bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID); | 861 bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID); |
862 char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask); | 862 char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask); |
863 if (cache_hit) { | 863 if (cache_hit) { |
864 // Check that the data in memory matches the contents of the I-cache. | 864 // Check that the data in memory matches the contents of the I-cache. |
865 CHECK(memcmp(reinterpret_cast<void*>(instr), | 865 CHECK(memcmp(reinterpret_cast<void*>(instr), |
866 cache_page->CachedData(offset), | 866 cache_page->CachedData(offset), |
867 Instruction::kInstrSize) == 0); | 867 Instruction::kInstrSize) == 0); |
868 } else { | 868 } else { |
869 // Cache miss. Load memory into the cache. | 869 // Cache miss. Load memory into the cache. |
870 memcpy(cached_line, line, CachePage::kLineLength); | 870 OS::MemCopy(cached_line, line, CachePage::kLineLength); |
871 *cache_valid_byte = CachePage::LINE_VALID; | 871 *cache_valid_byte = CachePage::LINE_VALID; |
872 } | 872 } |
873 } | 873 } |
874 | 874 |
875 | 875 |
876 void Simulator::Initialize(Isolate* isolate) { | 876 void Simulator::Initialize(Isolate* isolate) { |
877 if (isolate->simulator_initialized()) return; | 877 if (isolate->simulator_initialized()) return; |
878 isolate->set_simulator_initialized(true); | 878 isolate->set_simulator_initialized(true); |
879 ::v8::internal::ExternalReference::set_redirector(isolate, | 879 ::v8::internal::ExternalReference::set_redirector(isolate, |
880 &RedirectExternalReference); | 880 &RedirectExternalReference); |
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1052 } | 1052 } |
1053 | 1053 |
1054 | 1054 |
1055 double Simulator::get_double_from_register_pair(int reg) { | 1055 double Simulator::get_double_from_register_pair(int reg) { |
1056 ASSERT((reg >= 0) && (reg < kNumSimuRegisters) && ((reg % 2) == 0)); | 1056 ASSERT((reg >= 0) && (reg < kNumSimuRegisters) && ((reg % 2) == 0)); |
1057 | 1057 |
1058 double dm_val = 0.0; | 1058 double dm_val = 0.0; |
1059 // Read the bits from the unsigned integer register_[] array | 1059 // Read the bits from the unsigned integer register_[] array |
1060 // into the double precision floating point value and return it. | 1060 // into the double precision floating point value and return it. |
1061 char buffer[2 * sizeof(registers_[0])]; | 1061 char buffer[2 * sizeof(registers_[0])]; |
1062 memcpy(buffer, ®isters_[reg], 2 * sizeof(registers_[0])); | 1062 OS::MemCopy(buffer, ®isters_[reg], 2 * sizeof(registers_[0])); |
1063 memcpy(&dm_val, buffer, 2 * sizeof(registers_[0])); | 1063 OS::MemCopy(&dm_val, buffer, 2 * sizeof(registers_[0])); |
1064 return(dm_val); | 1064 return(dm_val); |
1065 } | 1065 } |
1066 | 1066 |
1067 | 1067 |
1068 int32_t Simulator::get_fpu_register(int fpureg) const { | 1068 int32_t Simulator::get_fpu_register(int fpureg) const { |
1069 ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters)); | 1069 ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters)); |
1070 return FPUregisters_[fpureg]; | 1070 return FPUregisters_[fpureg]; |
1071 } | 1071 } |
1072 | 1072 |
1073 | 1073 |
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1101 *z = get_register(a2); | 1101 *z = get_register(a2); |
1102 } else { | 1102 } else { |
1103 // We use a char buffer to get around the strict-aliasing rules which | 1103 // We use a char buffer to get around the strict-aliasing rules which |
1104 // otherwise allow the compiler to optimize away the copy. | 1104 // otherwise allow the compiler to optimize away the copy. |
1105 char buffer[sizeof(*x)]; | 1105 char buffer[sizeof(*x)]; |
1106 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); | 1106 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); |
1107 | 1107 |
1108 // Registers a0 and a1 -> x. | 1108 // Registers a0 and a1 -> x. |
1109 reg_buffer[0] = get_register(a0); | 1109 reg_buffer[0] = get_register(a0); |
1110 reg_buffer[1] = get_register(a1); | 1110 reg_buffer[1] = get_register(a1); |
1111 memcpy(x, buffer, sizeof(buffer)); | 1111 OS::MemCopy(x, buffer, sizeof(buffer)); |
1112 // Registers a2 and a3 -> y. | 1112 // Registers a2 and a3 -> y. |
1113 reg_buffer[0] = get_register(a2); | 1113 reg_buffer[0] = get_register(a2); |
1114 reg_buffer[1] = get_register(a3); | 1114 reg_buffer[1] = get_register(a3); |
1115 memcpy(y, buffer, sizeof(buffer)); | 1115 OS::MemCopy(y, buffer, sizeof(buffer)); |
1116 // Register 2 -> z. | 1116 // Register 2 -> z. |
1117 reg_buffer[0] = get_register(a2); | 1117 reg_buffer[0] = get_register(a2); |
1118 memcpy(z, buffer, sizeof(*z)); | 1118 OS::MemCopy(z, buffer, sizeof(*z)); |
1119 } | 1119 } |
1120 } | 1120 } |
1121 | 1121 |
1122 | 1122 |
1123 // The return value is either in v0/v1 or f0. | 1123 // The return value is either in v0/v1 or f0. |
1124 void Simulator::SetFpResult(const double& result) { | 1124 void Simulator::SetFpResult(const double& result) { |
1125 if (!IsMipsSoftFloatABI) { | 1125 if (!IsMipsSoftFloatABI) { |
1126 set_fpu_register_double(0, result); | 1126 set_fpu_register_double(0, result); |
1127 } else { | 1127 } else { |
1128 char buffer[2 * sizeof(registers_[0])]; | 1128 char buffer[2 * sizeof(registers_[0])]; |
1129 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); | 1129 int32_t* reg_buffer = reinterpret_cast<int32_t*>(buffer); |
1130 memcpy(buffer, &result, sizeof(buffer)); | 1130 OS::MemCopy(buffer, &result, sizeof(buffer)); |
1131 // Copy result to v0 and v1. | 1131 // Copy result to v0 and v1. |
1132 set_register(v0, reg_buffer[0]); | 1132 set_register(v0, reg_buffer[0]); |
1133 set_register(v1, reg_buffer[1]); | 1133 set_register(v1, reg_buffer[1]); |
1134 } | 1134 } |
1135 } | 1135 } |
1136 | 1136 |
1137 | 1137 |
1138 // Helper functions for setting and testing the FCSR register's bits. | 1138 // Helper functions for setting and testing the FCSR register's bits. |
1139 void Simulator::set_fcsr_bit(uint32_t cc, bool value) { | 1139 void Simulator::set_fcsr_bit(uint32_t cc, bool value) { |
1140 if (value) { | 1140 if (value) { |
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2860 } | 2860 } |
2861 | 2861 |
2862 | 2862 |
2863 double Simulator::CallFP(byte* entry, double d0, double d1) { | 2863 double Simulator::CallFP(byte* entry, double d0, double d1) { |
2864 if (!IsMipsSoftFloatABI) { | 2864 if (!IsMipsSoftFloatABI) { |
2865 set_fpu_register_double(f12, d0); | 2865 set_fpu_register_double(f12, d0); |
2866 set_fpu_register_double(f14, d1); | 2866 set_fpu_register_double(f14, d1); |
2867 } else { | 2867 } else { |
2868 int buffer[2]; | 2868 int buffer[2]; |
2869 ASSERT(sizeof(buffer[0]) * 2 == sizeof(d0)); | 2869 ASSERT(sizeof(buffer[0]) * 2 == sizeof(d0)); |
2870 memcpy(buffer, &d0, sizeof(d0)); | 2870 OS::MemCopy(buffer, &d0, sizeof(d0)); |
2871 set_dw_register(a0, buffer); | 2871 set_dw_register(a0, buffer); |
2872 memcpy(buffer, &d1, sizeof(d1)); | 2872 OS::MemCopy(buffer, &d1, sizeof(d1)); |
2873 set_dw_register(a2, buffer); | 2873 set_dw_register(a2, buffer); |
2874 } | 2874 } |
2875 CallInternal(entry); | 2875 CallInternal(entry); |
2876 if (!IsMipsSoftFloatABI) { | 2876 if (!IsMipsSoftFloatABI) { |
2877 return get_fpu_register_double(f0); | 2877 return get_fpu_register_double(f0); |
2878 } else { | 2878 } else { |
2879 return get_double_from_register_pair(v0); | 2879 return get_double_from_register_pair(v0); |
2880 } | 2880 } |
2881 } | 2881 } |
2882 | 2882 |
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2899 } | 2899 } |
2900 | 2900 |
2901 | 2901 |
2902 #undef UNSUPPORTED | 2902 #undef UNSUPPORTED |
2903 | 2903 |
2904 } } // namespace v8::internal | 2904 } } // namespace v8::internal |
2905 | 2905 |
2906 #endif // USE_SIMULATOR | 2906 #endif // USE_SIMULATOR |
2907 | 2907 |
2908 #endif // V8_TARGET_ARCH_MIPS | 2908 #endif // V8_TARGET_ARCH_MIPS |
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