| OLD | NEW |
| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 5 #ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
| 6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 6 #define V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
| 7 | 7 |
| 8 #include "src/arm64/assembler-arm64.h" | 8 #include "src/arm64/assembler-arm64.h" |
| 9 #include "src/assembler.h" | 9 #include "src/assembler.h" |
| 10 #include "src/debug/debug.h" | 10 #include "src/debug/debug.h" |
| (...skipping 23 matching lines...) Expand all Loading... |
| 34 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode); | 34 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode); |
| 35 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && | 35 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && |
| 36 IsCodeTarget(rmode_)) { | 36 IsCodeTarget(rmode_)) { |
| 37 Object* target_code = Code::GetCodeFromTargetAddress(target); | 37 Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 38 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | 38 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 39 host(), this, HeapObject::cast(target_code)); | 39 host(), this, HeapObject::cast(target_code)); |
| 40 } | 40 } |
| 41 } | 41 } |
| 42 | 42 |
| 43 | 43 |
| 44 inline unsigned CPURegister::code() const { | 44 inline int CPURegister::code() const { |
| 45 DCHECK(IsValid()); | 45 DCHECK(IsValid()); |
| 46 return reg_code; | 46 return reg_code; |
| 47 } | 47 } |
| 48 | 48 |
| 49 | 49 |
| 50 inline CPURegister::RegisterType CPURegister::type() const { | 50 inline CPURegister::RegisterType CPURegister::type() const { |
| 51 DCHECK(IsValidOrNone()); | 51 DCHECK(IsValidOrNone()); |
| 52 return reg_type; | 52 return reg_type; |
| 53 } | 53 } |
| 54 | 54 |
| 55 | 55 |
| 56 inline RegList CPURegister::Bit() const { | 56 inline RegList CPURegister::Bit() const { |
| 57 DCHECK(reg_code < (sizeof(RegList) * kBitsPerByte)); | 57 DCHECK(static_cast<size_t>(reg_code) < (sizeof(RegList) * kBitsPerByte)); |
| 58 return IsValid() ? 1UL << reg_code : 0; | 58 return IsValid() ? 1UL << reg_code : 0; |
| 59 } | 59 } |
| 60 | 60 |
| 61 | 61 |
| 62 inline unsigned CPURegister::SizeInBits() const { | 62 inline int CPURegister::SizeInBits() const { |
| 63 DCHECK(IsValid()); | 63 DCHECK(IsValid()); |
| 64 return reg_size; | 64 return reg_size; |
| 65 } | 65 } |
| 66 | 66 |
| 67 | 67 |
| 68 inline int CPURegister::SizeInBytes() const { | 68 inline int CPURegister::SizeInBytes() const { |
| 69 DCHECK(IsValid()); | 69 DCHECK(IsValid()); |
| 70 DCHECK(SizeInBits() % 8 == 0); | 70 DCHECK(SizeInBits() % 8 == 0); |
| 71 return reg_size / 8; | 71 return reg_size / 8; |
| 72 } | 72 } |
| (...skipping 1183 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1256 | 1256 |
| 1257 void Assembler::ClearRecordedAstId() { | 1257 void Assembler::ClearRecordedAstId() { |
| 1258 recorded_ast_id_ = TypeFeedbackId::None(); | 1258 recorded_ast_id_ = TypeFeedbackId::None(); |
| 1259 } | 1259 } |
| 1260 | 1260 |
| 1261 | 1261 |
| 1262 } // namespace internal | 1262 } // namespace internal |
| 1263 } // namespace v8 | 1263 } // namespace v8 |
| 1264 | 1264 |
| 1265 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ | 1265 #endif // V8_ARM64_ASSEMBLER_ARM64_INL_H_ |
| OLD | NEW |