| Index: runtime/vm/cpu_mips.cc
|
| ===================================================================
|
| --- runtime/vm/cpu_mips.cc (revision 21386)
|
| +++ runtime/vm/cpu_mips.cc (working copy)
|
| @@ -7,6 +7,7 @@
|
| #if defined(TARGET_ARCH_MIPS)
|
|
|
| #if defined(HOST_ARCH_MIPS)
|
| +#include <asm/cachectl.h> /* NOLINT */
|
| #include <sys/syscall.h> /* NOLINT */
|
| #include <unistd.h> /* NOLINT */
|
| #endif
|
| @@ -16,7 +17,15 @@
|
| namespace dart {
|
|
|
| void CPU::FlushICache(uword start, uword size) {
|
| - UNIMPLEMENTED();
|
| +#if defined(HOST_ARCH_MIPS)
|
| + int res;
|
| + // See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
|
| + res = syscall(__NR_cacheflush, start, size, ICACHE);
|
| + ASSERT(res == 0);
|
| +#else // defined(HOST_ARCH_MIPS)
|
| + // When running in simulated mode we do not need to flush the ICache because
|
| + // we are not running on the actual hardware.
|
| +#endif // defined(HOST_ARCH_MIPS)
|
| }
|
|
|
|
|
|
|