Index: tests_lit/reader_tests/load.ll |
diff --git a/tests_lit/reader_tests/load.ll b/tests_lit/reader_tests/load.ll |
index 087e750f9aecc66ab89f67dece7faecb805d6eb6..08d4e842ccc0727e8dad9480744ba98224566d16 100644 |
--- a/tests_lit/reader_tests/load.ll |
+++ b/tests_lit/reader_tests/load.ll |
@@ -6,7 +6,7 @@ |
; RUN: | %if --need=allow_disable_ir_gen --command \ |
; RUN: FileCheck --check-prefix=NOIR %s |
-define i32 @load_i8(i32 %addr) { |
+define internal i32 @load_i8(i32 %addr) { |
entry: |
%addr_i8 = inttoptr i32 %addr to i8* |
%v = load i8, i8* %addr_i8, align 1 |
@@ -19,7 +19,7 @@ entry: |
; CHECK-NEXT: ret i32 %__2 |
} |
-define i32 @load_i16(i32 %addr) { |
+define internal i32 @load_i16(i32 %addr) { |
entry: |
%addr_i16 = inttoptr i32 %addr to i16* |
%v = load i16, i16* %addr_i16, align 1 |
@@ -32,7 +32,7 @@ entry: |
; CHECK-NEXT: ret i32 %__2 |
} |
-define i32 @load_i32(i32 %addr) { |
+define internal i32 @load_i32(i32 %addr) { |
entry: |
%addr_i32 = inttoptr i32 %addr to i32* |
%v = load i32, i32* %addr_i32, align 1 |
@@ -43,7 +43,7 @@ entry: |
; CHECK-NEXT: ret i32 %__1 |
} |
-define i64 @load_i64(i32 %addr) { |
+define internal i64 @load_i64(i32 %addr) { |
entry: |
%addr_i64 = inttoptr i32 %addr to i64* |
%v = load i64, i64* %addr_i64, align 1 |
@@ -54,7 +54,7 @@ entry: |
; CHECK-NEXT: ret i64 %__1 |
} |
-define float @load_float_a1(i32 %addr) { |
+define internal float @load_float_a1(i32 %addr) { |
entry: |
%addr_float = inttoptr i32 %addr to float* |
%v = load float, float* %addr_float, align 1 |
@@ -68,7 +68,7 @@ entry: |
} |
-define float @load_float_a4(i32 %addr) { |
+define internal float @load_float_a4(i32 %addr) { |
entry: |
%addr_float = inttoptr i32 %addr to float* |
%v = load float, float* %addr_float, align 4 |
@@ -79,7 +79,7 @@ entry: |
; CHECK-NEXT: ret float %__1 |
} |
-define double @load_double_a1(i32 %addr) { |
+define internal double @load_double_a1(i32 %addr) { |
entry: |
%addr_double = inttoptr i32 %addr to double* |
%v = load double, double* %addr_double, align 1 |
@@ -93,7 +93,7 @@ entry: |
} |
-define double @load_double_a8(i32 %addr) { |
+define internal double @load_double_a8(i32 %addr) { |
entry: |
%addr_double = inttoptr i32 %addr to double* |
%v = load double, double* %addr_double, align 8 |
@@ -104,7 +104,7 @@ entry: |
; CHECK-NEXT: ret double %__1 |
} |
-define <16 x i8> @load_v16xI8(i32 %addr) { |
+define internal <16 x i8> @load_v16xI8(i32 %addr) { |
entry: |
%addr_v16xI8 = inttoptr i32 %addr to <16 x i8>* |
%v = load <16 x i8>, <16 x i8>* %addr_v16xI8, align 1 |
@@ -115,7 +115,7 @@ entry: |
; CHECK-NEXT: ret <16 x i8> %__1 |
} |
-define <8 x i16> @load_v8xI16(i32 %addr) { |
+define internal <8 x i16> @load_v8xI16(i32 %addr) { |
entry: |
%addr_v8xI16 = inttoptr i32 %addr to <8 x i16>* |
%v = load <8 x i16>, <8 x i16>* %addr_v8xI16, align 2 |
@@ -126,7 +126,7 @@ entry: |
; CHECK-NEXT: ret <8 x i16> %__1 |
} |
-define <4 x i32> @load_v4xI32(i32 %addr) { |
+define internal <4 x i32> @load_v4xI32(i32 %addr) { |
entry: |
%addr_v4xI32 = inttoptr i32 %addr to <4 x i32>* |
%v = load <4 x i32>, <4 x i32>* %addr_v4xI32, align 4 |
@@ -137,7 +137,7 @@ entry: |
; CHECK-NEXT: ret <4 x i32> %__1 |
} |
-define <4 x float> @load_v4xFloat(i32 %addr) { |
+define internal <4 x float> @load_v4xFloat(i32 %addr) { |
entry: |
%addr_v4xFloat = inttoptr i32 %addr to <4 x float>* |
%v = load <4 x float>, <4 x float>* %addr_v4xFloat, align 4 |