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1 ; This is a test of C-level conversion operations that clang lowers | 1 ; This is a test of C-level conversion operations that clang lowers |
2 ; into pairs of shifts. | 2 ; into pairs of shifts. |
3 | 3 |
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
5 ; RUN: --target x8632 -i %s --args -O2 \ | 5 ; RUN: --target x8632 -i %s --args -O2 \ |
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
7 | 7 |
8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
9 ; RUN: --target x8632 -i %s --args -Om1 \ | 9 ; RUN: --target x8632 -i %s --args -Om1 \ |
10 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 10 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
(...skipping 11 matching lines...) Expand all Loading... |
22 ; RUN: --command %p2i --filetype=asm --assemble \ | 22 ; RUN: --command %p2i --filetype=asm --assemble \ |
23 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ | 23 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ |
24 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | 24 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
25 ; RUN: --command FileCheck --check-prefix ARM32 %s | 25 ; RUN: --command FileCheck --check-prefix ARM32 %s |
26 | 26 |
27 | 27 |
28 @i1 = internal global [4 x i8] zeroinitializer, align 4 | 28 @i1 = internal global [4 x i8] zeroinitializer, align 4 |
29 @i2 = internal global [4 x i8] zeroinitializer, align 4 | 29 @i2 = internal global [4 x i8] zeroinitializer, align 4 |
30 @u1 = internal global [4 x i8] zeroinitializer, align 4 | 30 @u1 = internal global [4 x i8] zeroinitializer, align 4 |
31 | 31 |
32 define void @conv1() { | 32 define internal void @conv1() { |
33 entry: | 33 entry: |
34 %__0 = bitcast [4 x i8]* @u1 to i32* | 34 %__0 = bitcast [4 x i8]* @u1 to i32* |
35 %v0 = load i32, i32* %__0, align 1 | 35 %v0 = load i32, i32* %__0, align 1 |
36 %sext = shl i32 %v0, 24 | 36 %sext = shl i32 %v0, 24 |
37 %v1 = ashr i32 %sext, 24 | 37 %v1 = ashr i32 %sext, 24 |
38 %__4 = bitcast [4 x i8]* @i1 to i32* | 38 %__4 = bitcast [4 x i8]* @i1 to i32* |
39 store i32 %v1, i32* %__4, align 1 | 39 store i32 %v1, i32* %__4, align 1 |
40 ret void | 40 ret void |
41 } | 41 } |
42 ; CHECK-LABEL: conv1 | 42 ; CHECK-LABEL: conv1 |
43 ; CHECK: shl {{.*}},0x18 | 43 ; CHECK: shl {{.*}},0x18 |
44 ; CHECK: sar {{.*}},0x18 | 44 ; CHECK: sar {{.*}},0x18 |
45 | 45 |
46 ; ARM32-LABEL: conv1 | 46 ; ARM32-LABEL: conv1 |
47 ; ARM32: lsl {{.*}}, #24 | 47 ; ARM32: lsl {{.*}}, #24 |
48 ; ARM32: asr {{.*}}, #24 | 48 ; ARM32: asr {{.*}}, #24 |
49 | 49 |
50 define void @conv2() { | 50 define internal void @conv2() { |
51 entry: | 51 entry: |
52 %__0 = bitcast [4 x i8]* @u1 to i32* | 52 %__0 = bitcast [4 x i8]* @u1 to i32* |
53 %v0 = load i32, i32* %__0, align 1 | 53 %v0 = load i32, i32* %__0, align 1 |
54 %sext1 = shl i32 %v0, 16 | 54 %sext1 = shl i32 %v0, 16 |
55 %v1 = lshr i32 %sext1, 16 | 55 %v1 = lshr i32 %sext1, 16 |
56 %__4 = bitcast [4 x i8]* @i2 to i32* | 56 %__4 = bitcast [4 x i8]* @i2 to i32* |
57 store i32 %v1, i32* %__4, align 1 | 57 store i32 %v1, i32* %__4, align 1 |
58 ret void | 58 ret void |
59 } | 59 } |
60 ; CHECK-LABEL: conv2 | 60 ; CHECK-LABEL: conv2 |
61 ; CHECK: shl {{.*}},0x10 | 61 ; CHECK: shl {{.*}},0x10 |
62 ; CHECK: shr {{.*}},0x10 | 62 ; CHECK: shr {{.*}},0x10 |
63 | 63 |
64 ; ARM32-LABEL: conv2 | 64 ; ARM32-LABEL: conv2 |
65 ; ARM32: lsl {{.*}}, #16 | 65 ; ARM32: lsl {{.*}}, #16 |
66 ; ARM32: lsr {{.*}}, #16 | 66 ; ARM32: lsr {{.*}}, #16 |
67 | 67 |
68 define i32 @shlImmLarge(i32 %val) { | 68 define internal i32 @shlImmLarge(i32 %val) { |
69 entry: | 69 entry: |
70 %result = shl i32 %val, 257 | 70 %result = shl i32 %val, 257 |
71 ret i32 %result | 71 ret i32 %result |
72 } | 72 } |
73 ; CHECK-LABEL: shlImmLarge | 73 ; CHECK-LABEL: shlImmLarge |
74 ; CHECK: shl {{.*}},0x1 | 74 ; CHECK: shl {{.*}},0x1 |
75 | 75 |
76 define i32 @shlImmNeg(i32 %val) { | 76 define internal i32 @shlImmNeg(i32 %val) { |
77 entry: | 77 entry: |
78 %result = shl i32 %val, -1 | 78 %result = shl i32 %val, -1 |
79 ret i32 %result | 79 ret i32 %result |
80 } | 80 } |
81 ; CHECK-LABEL: shlImmNeg | 81 ; CHECK-LABEL: shlImmNeg |
82 ; CHECK: shl {{.*}},0xff | 82 ; CHECK: shl {{.*}},0xff |
83 | 83 |
84 define i32 @lshrImmLarge(i32 %val) { | 84 define internal i32 @lshrImmLarge(i32 %val) { |
85 entry: | 85 entry: |
86 %result = lshr i32 %val, 257 | 86 %result = lshr i32 %val, 257 |
87 ret i32 %result | 87 ret i32 %result |
88 } | 88 } |
89 ; CHECK-LABEL: lshrImmLarge | 89 ; CHECK-LABEL: lshrImmLarge |
90 ; CHECK: shr {{.*}},0x1 | 90 ; CHECK: shr {{.*}},0x1 |
91 | 91 |
92 define i32 @lshrImmNeg(i32 %val) { | 92 define internal i32 @lshrImmNeg(i32 %val) { |
93 entry: | 93 entry: |
94 %result = lshr i32 %val, -1 | 94 %result = lshr i32 %val, -1 |
95 ret i32 %result | 95 ret i32 %result |
96 } | 96 } |
97 ; CHECK-LABEL: lshrImmNeg | 97 ; CHECK-LABEL: lshrImmNeg |
98 ; CHECK: shr {{.*}},0xff | 98 ; CHECK: shr {{.*}},0xff |
99 | 99 |
100 define i32 @ashrImmLarge(i32 %val) { | 100 define internal i32 @ashrImmLarge(i32 %val) { |
101 entry: | 101 entry: |
102 %result = ashr i32 %val, 257 | 102 %result = ashr i32 %val, 257 |
103 ret i32 %result | 103 ret i32 %result |
104 } | 104 } |
105 ; CHECK-LABEL: ashrImmLarge | 105 ; CHECK-LABEL: ashrImmLarge |
106 ; CHECK: sar {{.*}},0x1 | 106 ; CHECK: sar {{.*}},0x1 |
107 | 107 |
108 define i32 @ashrImmNeg(i32 %val) { | 108 define internal i32 @ashrImmNeg(i32 %val) { |
109 entry: | 109 entry: |
110 %result = ashr i32 %val, -1 | 110 %result = ashr i32 %val, -1 |
111 ret i32 %result | 111 ret i32 %result |
112 } | 112 } |
113 ; CHECK-LABEL: ashrImmNeg | 113 ; CHECK-LABEL: ashrImmNeg |
114 ; CHECK: sar {{.*}},0xff | 114 ; CHECK: sar {{.*}},0xff |
115 | 115 |
116 define i64 @shlImm64One(i64 %val) { | 116 define internal i64 @shlImm64One(i64 %val) { |
117 entry: | 117 entry: |
118 %result = shl i64 %val, 1 | 118 %result = shl i64 %val, 1 |
119 ret i64 %result | 119 ret i64 %result |
120 } | 120 } |
121 ; CHECK-LABEL: shlImm64One | 121 ; CHECK-LABEL: shlImm64One |
122 ; CHECK: shl {{.*}},1 | 122 ; CHECK: shl {{.*}},1 |
123 | 123 |
124 define i64 @shlImm64LessThan32(i64 %val) { | 124 define internal i64 @shlImm64LessThan32(i64 %val) { |
125 entry: | 125 entry: |
126 %result = shl i64 %val, 4 | 126 %result = shl i64 %val, 4 |
127 ret i64 %result | 127 ret i64 %result |
128 } | 128 } |
129 ; CHECK-LABEL: shlImm64LessThan32 | 129 ; CHECK-LABEL: shlImm64LessThan32 |
130 ; CHECK: shl {{.*}},0x4 | 130 ; CHECK: shl {{.*}},0x4 |
131 | 131 |
132 define i64 @shlImm64Equal32(i64 %val) { | 132 define internal i64 @shlImm64Equal32(i64 %val) { |
133 entry: | 133 entry: |
134 %result = shl i64 %val, 32 | 134 %result = shl i64 %val, 32 |
135 ret i64 %result | 135 ret i64 %result |
136 } | 136 } |
137 ; CHECK-LABEL: shlImm64Equal32 | 137 ; CHECK-LABEL: shlImm64Equal32 |
138 ; CHECK-NOT: shl | 138 ; CHECK-NOT: shl |
139 | 139 |
140 define i64 @shlImm64GreaterThan32(i64 %val) { | 140 define internal i64 @shlImm64GreaterThan32(i64 %val) { |
141 entry: | 141 entry: |
142 %result = shl i64 %val, 40 | 142 %result = shl i64 %val, 40 |
143 ret i64 %result | 143 ret i64 %result |
144 } | 144 } |
145 ; CHECK-LABEL: shlImm64GreaterThan32 | 145 ; CHECK-LABEL: shlImm64GreaterThan32 |
146 ; CHECK: shl {{.*}},0x8 | 146 ; CHECK: shl {{.*}},0x8 |
147 | 147 |
148 define i64 @lshrImm64One(i64 %val) { | 148 define internal i64 @lshrImm64One(i64 %val) { |
149 entry: | 149 entry: |
150 %result = lshr i64 %val, 1 | 150 %result = lshr i64 %val, 1 |
151 ret i64 %result | 151 ret i64 %result |
152 } | 152 } |
153 ; CHECK-LABEL: lshrImm64One | 153 ; CHECK-LABEL: lshrImm64One |
154 ; CHECK: shr {{.*}},1 | 154 ; CHECK: shr {{.*}},1 |
155 | 155 |
156 define i64 @lshrImm64LessThan32(i64 %val) { | 156 define internal i64 @lshrImm64LessThan32(i64 %val) { |
157 entry: | 157 entry: |
158 %result = lshr i64 %val, 4 | 158 %result = lshr i64 %val, 4 |
159 ret i64 %result | 159 ret i64 %result |
160 } | 160 } |
161 ; CHECK-LABEL: lshrImm64LessThan32 | 161 ; CHECK-LABEL: lshrImm64LessThan32 |
162 ; CHECK: shrd {{.*}},0x4 | 162 ; CHECK: shrd {{.*}},0x4 |
163 ; CHECK: shr {{.*}},0x4 | 163 ; CHECK: shr {{.*}},0x4 |
164 | 164 |
165 define i64 @lshrImm64Equal32(i64 %val) { | 165 define internal i64 @lshrImm64Equal32(i64 %val) { |
166 entry: | 166 entry: |
167 %result = lshr i64 %val, 32 | 167 %result = lshr i64 %val, 32 |
168 ret i64 %result | 168 ret i64 %result |
169 } | 169 } |
170 ; CHECK-LABEL: lshrImm64Equal32 | 170 ; CHECK-LABEL: lshrImm64Equal32 |
171 ; CHECK-NOT: shr | 171 ; CHECK-NOT: shr |
172 | 172 |
173 define i64 @lshrImm64GreaterThan32(i64 %val) { | 173 define internal i64 @lshrImm64GreaterThan32(i64 %val) { |
174 entry: | 174 entry: |
175 %result = lshr i64 %val, 40 | 175 %result = lshr i64 %val, 40 |
176 ret i64 %result | 176 ret i64 %result |
177 } | 177 } |
178 ; CHECK-LABEL: lshrImm64GreaterThan32 | 178 ; CHECK-LABEL: lshrImm64GreaterThan32 |
179 ; CHECK-NOT: shrd | 179 ; CHECK-NOT: shrd |
180 ; CHECK: shr {{.*}},0x8 | 180 ; CHECK: shr {{.*}},0x8 |
181 | 181 |
182 define i64 @ashrImm64One(i64 %val) { | 182 define internal i64 @ashrImm64One(i64 %val) { |
183 entry: | 183 entry: |
184 %result = ashr i64 %val, 1 | 184 %result = ashr i64 %val, 1 |
185 ret i64 %result | 185 ret i64 %result |
186 } | 186 } |
187 ; CHECK-LABEL: ashrImm64One | 187 ; CHECK-LABEL: ashrImm64One |
188 ; CHECK: shrd {{.*}},0x1 | 188 ; CHECK: shrd {{.*}},0x1 |
189 ; CHECK: sar {{.*}},1 | 189 ; CHECK: sar {{.*}},1 |
190 | 190 |
191 define i64 @ashrImm64LessThan32(i64 %val) { | 191 define internal i64 @ashrImm64LessThan32(i64 %val) { |
192 entry: | 192 entry: |
193 %result = ashr i64 %val, 4 | 193 %result = ashr i64 %val, 4 |
194 ret i64 %result | 194 ret i64 %result |
195 } | 195 } |
196 ; CHECK-LABEL: ashrImm64LessThan32 | 196 ; CHECK-LABEL: ashrImm64LessThan32 |
197 ; CHECK: shrd {{.*}},0x4 | 197 ; CHECK: shrd {{.*}},0x4 |
198 ; CHECK: sar {{.*}},0x4 | 198 ; CHECK: sar {{.*}},0x4 |
199 | 199 |
200 define i64 @ashrImm64Equal32(i64 %val) { | 200 define internal i64 @ashrImm64Equal32(i64 %val) { |
201 entry: | 201 entry: |
202 %result = ashr i64 %val, 32 | 202 %result = ashr i64 %val, 32 |
203 ret i64 %result | 203 ret i64 %result |
204 } | 204 } |
205 ; CHECK-LABEL: ashrImm64Equal32 | 205 ; CHECK-LABEL: ashrImm64Equal32 |
206 ; CHECK: sar {{.*}},0x1f | 206 ; CHECK: sar {{.*}},0x1f |
207 ; CHECK-NOT: shrd | 207 ; CHECK-NOT: shrd |
208 | 208 |
209 define i64 @ashrImm64GreaterThan32(i64 %val) { | 209 define internal i64 @ashrImm64GreaterThan32(i64 %val) { |
210 entry: | 210 entry: |
211 %result = ashr i64 %val, 40 | 211 %result = ashr i64 %val, 40 |
212 ret i64 %result | 212 ret i64 %result |
213 } | 213 } |
214 ; CHECK-LABEL: ashrImm64GreaterThan32 | 214 ; CHECK-LABEL: ashrImm64GreaterThan32 |
215 ; CHECK: sar {{.*}},0x1f | 215 ; CHECK: sar {{.*}},0x1f |
216 ; CHECK: shrd {{.*}},0x8 | 216 ; CHECK: shrd {{.*}},0x8 |
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