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Side by Side Diff: tests_lit/llvm2ice_tests/nacl-atomic-cmpxchg-optimization.ll

Issue 1387963002: Make sure that all globals are internal, except for "start" functions. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix new tests. Created 5 years, 2 months ago
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1 ; This tests the optimization of atomic cmpxchg w/ following cmp + branches. 1 ; This tests the optimization of atomic cmpxchg w/ following cmp + branches.
2 2
3 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ 3 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \
4 ; RUN: | FileCheck --check-prefix=O2 %s 4 ; RUN: -allow-externally-defined-symbols | FileCheck --check-prefix=O2 %s
5 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \ 5 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \
6 ; RUN: | FileCheck --check-prefix=OM1 %s 6 ; RUN: -allow-externally-defined-symbols | FileCheck --check-prefix=OM1 %s
7 7
8 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32) 8 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32)
9 9
10 10
11 ; Test that a cmpxchg followed by icmp eq and branch can be optimized to 11 ; Test that a cmpxchg followed by icmp eq and branch can be optimized to
12 ; reuse the flags set by the cmpxchg instruction itself. 12 ; reuse the flags set by the cmpxchg instruction itself.
13 ; This is only expected to work w/ O2, based on lightweight liveness. 13 ; This is only expected to work w/ O2, based on lightweight liveness.
14 ; (Or if we had other means to detect the only use). 14 ; (Or if we had other means to detect the only use).
15 declare void @use_value(i32) 15 declare void @use_value(i32)
16 16
17 define i32 @test_atomic_cmpxchg_loop(i32 %iptr, i32 %expected, i32 %desired) { 17 define internal i32 @test_atomic_cmpxchg_loop(i32 %iptr, i32 %expected,
18 i32 %desired) {
18 entry: 19 entry:
19 br label %loop 20 br label %loop
20 21
21 loop: 22 loop:
22 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] 23 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ]
23 %succeeded_first_try = phi i32 [ 1, %entry ], [ 2, %loop ] 24 %succeeded_first_try = phi i32 [ 1, %entry ], [ 2, %loop ]
24 %ptr = inttoptr i32 %iptr to i32* 25 %ptr = inttoptr i32 %iptr to i32*
25 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, 26 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop,
26 i32 %desired, i32 6, i32 6) 27 i32 %desired, i32 6, i32 6)
27 %success = icmp eq i32 %expected_loop, %old 28 %success = icmp eq i32 %expected_loop, %old
(...skipping 10 matching lines...) Expand all
38 ; O2: call 39 ; O2: call
39 ; 40 ;
40 ; Check that the unopt version does have a cmp 41 ; Check that the unopt version does have a cmp
41 ; OM1-LABEL: test_atomic_cmpxchg_loop 42 ; OM1-LABEL: test_atomic_cmpxchg_loop
42 ; OM1: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}} 43 ; OM1: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
43 ; OM1: cmp 44 ; OM1: cmp
44 ; OM1: sete 45 ; OM1: sete
45 ; OM1: call 46 ; OM1: call
46 47
47 ; Still works if the compare operands are flipped. 48 ; Still works if the compare operands are flipped.
48 define i32 @test_atomic_cmpxchg_loop2(i32 %iptr, i32 %expected, i32 %desired) { 49 define internal i32 @test_atomic_cmpxchg_loop2(i32 %iptr, i32 %expected,
50 i32 %desired) {
49 entry: 51 entry:
50 br label %loop 52 br label %loop
51 53
52 loop: 54 loop:
53 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] 55 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ]
54 %ptr = inttoptr i32 %iptr to i32* 56 %ptr = inttoptr i32 %iptr to i32*
55 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, 57 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop,
56 i32 %desired, i32 6, i32 6) 58 i32 %desired, i32 6, i32 6)
57 %success = icmp eq i32 %old, %expected_loop 59 %success = icmp eq i32 %old, %expected_loop
58 br i1 %success, label %done, label %loop 60 br i1 %success, label %done, label %loop
59 61
60 done: 62 done:
61 ret i32 %old 63 ret i32 %old
62 } 64 }
63 ; O2-LABEL: test_atomic_cmpxchg_loop2 65 ; O2-LABEL: test_atomic_cmpxchg_loop2
64 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}} 66 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
65 ; O2-NOT: cmp 67 ; O2-NOT: cmp
66 ; O2: jne 68 ; O2: jne
67 69
68 70
69 ; Still works if the compare operands are constants. 71 ; Still works if the compare operands are constants.
70 define i32 @test_atomic_cmpxchg_loop_const(i32 %iptr, i32 %desired) { 72 define internal i32 @test_atomic_cmpxchg_loop_const(i32 %iptr, i32 %desired) {
71 entry: 73 entry:
72 br label %loop 74 br label %loop
73 75
74 loop: 76 loop:
75 %succeeded_first_try = phi i32 [ 1, %entry ], [ 0, %loop ] 77 %succeeded_first_try = phi i32 [ 1, %entry ], [ 0, %loop ]
76 %ptr = inttoptr i32 %iptr to i32* 78 %ptr = inttoptr i32 %iptr to i32*
77 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 0, 79 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 0,
78 i32 %desired, i32 6, i32 6) 80 i32 %desired, i32 6, i32 6)
79 %success = icmp eq i32 %old, 0 81 %success = icmp eq i32 %old, 0
80 br i1 %success, label %done, label %loop 82 br i1 %success, label %done, label %loop
81 83
82 done: 84 done:
83 ret i32 %succeeded_first_try 85 ret i32 %succeeded_first_try
84 } 86 }
85 ; O2-LABEL: test_atomic_cmpxchg_loop_const 87 ; O2-LABEL: test_atomic_cmpxchg_loop_const
86 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}} 88 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
87 ; O2-NEXT: j{{e|ne}} 89 ; O2-NEXT: j{{e|ne}}
88 90
89 ; This is a case where the flags cannot be reused (compare is for some 91 ; This is a case where the flags cannot be reused (compare is for some
90 ; other condition). 92 ; other condition).
91 define i32 @test_atomic_cmpxchg_no_opt(i32 %iptr, i32 %expected, i32 %desired) { 93 define internal i32 @test_atomic_cmpxchg_no_opt(i32 %iptr, i32 %expected,
94 i32 %desired) {
92 entry: 95 entry:
93 br label %loop 96 br label %loop
94 97
95 loop: 98 loop:
96 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] 99 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ]
97 %ptr = inttoptr i32 %iptr to i32* 100 %ptr = inttoptr i32 %iptr to i32*
98 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, 101 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop,
99 i32 %desired, i32 6, i32 6) 102 i32 %desired, i32 6, i32 6)
100 %success = icmp sgt i32 %old, %expected 103 %success = icmp sgt i32 %old, %expected
101 br i1 %success, label %done, label %loop 104 br i1 %success, label %done, label %loop
102 105
103 done: 106 done:
104 ret i32 %old 107 ret i32 %old
105 } 108 }
106 ; O2-LABEL: test_atomic_cmpxchg_no_opt 109 ; O2-LABEL: test_atomic_cmpxchg_no_opt
107 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}} 110 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
108 ; O2: cmp 111 ; O2: cmp
109 ; O2: jle 112 ; O2: jle
110 113
111 ; Another case where the flags cannot be reused (the comparison result 114 ; Another case where the flags cannot be reused (the comparison result
112 ; is used somewhere else). 115 ; is used somewhere else).
113 define i32 @test_atomic_cmpxchg_no_opt2(i32 %iptr, i32 %expected, i32 %desired) { 116 define internal i32 @test_atomic_cmpxchg_no_opt2(i32 %iptr, i32 %expected,
117 i32 %desired) {
114 entry: 118 entry:
115 br label %loop 119 br label %loop
116 120
117 loop: 121 loop:
118 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] 122 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ]
119 %ptr = inttoptr i32 %iptr to i32* 123 %ptr = inttoptr i32 %iptr to i32*
120 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, 124 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop,
121 i32 %desired, i32 6, i32 6) 125 i32 %desired, i32 6, i32 6)
122 %success = icmp eq i32 %old, %expected 126 %success = icmp eq i32 %old, %expected
123 br i1 %success, label %done, label %loop 127 br i1 %success, label %done, label %loop
124 128
125 done: 129 done:
126 %r = zext i1 %success to i32 130 %r = zext i1 %success to i32
127 ret i32 %r 131 ret i32 %r
128 } 132 }
129 ; O2-LABEL: test_atomic_cmpxchg_no_opt2 133 ; O2-LABEL: test_atomic_cmpxchg_no_opt2
130 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}} 134 ; O2: lock cmpxchg DWORD PTR [e{{[^a].}}],e{{[^a]}}
131 ; O2: cmp 135 ; O2: cmp
132 ; O2: sete 136 ; O2: sete
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