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| 1 ; Simple test of signed and unsigned integer conversions. | 1 ; Simple test of signed and unsigned integer conversions. |
| 2 | 2 |
| 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 4 ; RUN: --target x8632 -i %s --args -O2 \ | 4 ; RUN: --target x8632 -i %s --args -O2 \ |
| 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 6 | 6 |
| 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 8 ; RUN: --target x8632 -i %s --args -Om1 \ | 8 ; RUN: --target x8632 -i %s --args -Om1 \ |
| 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 9 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 10 | 10 |
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| 25 | 25 |
| 26 @i8v = internal global [1 x i8] zeroinitializer, align 1 | 26 @i8v = internal global [1 x i8] zeroinitializer, align 1 |
| 27 @i16v = internal global [2 x i8] zeroinitializer, align 2 | 27 @i16v = internal global [2 x i8] zeroinitializer, align 2 |
| 28 @i32v = internal global [4 x i8] zeroinitializer, align 4 | 28 @i32v = internal global [4 x i8] zeroinitializer, align 4 |
| 29 @i64v = internal global [8 x i8] zeroinitializer, align 8 | 29 @i64v = internal global [8 x i8] zeroinitializer, align 8 |
| 30 @u8v = internal global [1 x i8] zeroinitializer, align 1 | 30 @u8v = internal global [1 x i8] zeroinitializer, align 1 |
| 31 @u16v = internal global [2 x i8] zeroinitializer, align 2 | 31 @u16v = internal global [2 x i8] zeroinitializer, align 2 |
| 32 @u32v = internal global [4 x i8] zeroinitializer, align 4 | 32 @u32v = internal global [4 x i8] zeroinitializer, align 4 |
| 33 @u64v = internal global [8 x i8] zeroinitializer, align 8 | 33 @u64v = internal global [8 x i8] zeroinitializer, align 8 |
| 34 | 34 |
| 35 define void @from_int8() { | 35 define internal void @from_int8() { |
| 36 entry: | 36 entry: |
| 37 %__0 = bitcast [1 x i8]* @i8v to i8* | 37 %__0 = bitcast [1 x i8]* @i8v to i8* |
| 38 %v0 = load i8, i8* %__0, align 1 | 38 %v0 = load i8, i8* %__0, align 1 |
| 39 %v1 = sext i8 %v0 to i16 | 39 %v1 = sext i8 %v0 to i16 |
| 40 %__3 = bitcast [2 x i8]* @i16v to i16* | 40 %__3 = bitcast [2 x i8]* @i16v to i16* |
| 41 store i16 %v1, i16* %__3, align 1 | 41 store i16 %v1, i16* %__3, align 1 |
| 42 %v2 = sext i8 %v0 to i32 | 42 %v2 = sext i8 %v0 to i32 |
| 43 %__5 = bitcast [4 x i8]* @i32v to i32* | 43 %__5 = bitcast [4 x i8]* @i32v to i32* |
| 44 store i32 %v2, i32* %__5, align 1 | 44 store i32 %v2, i32* %__5, align 1 |
| 45 %v3 = sext i8 %v0 to i64 | 45 %v3 = sext i8 %v0 to i64 |
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| 66 ; ARM32: strh | 66 ; ARM32: strh |
| 67 ; ARM32: sxtb | 67 ; ARM32: sxtb |
| 68 ; ARM32: movw {{.*}}i32v | 68 ; ARM32: movw {{.*}}i32v |
| 69 ; ARM32: str r | 69 ; ARM32: str r |
| 70 ; ARM32: sxtb | 70 ; ARM32: sxtb |
| 71 ; ARM32: asr | 71 ; ARM32: asr |
| 72 ; ARM32: movw {{.*}}i64v | 72 ; ARM32: movw {{.*}}i64v |
| 73 ; ARM32-DAG: str r{{.*}}, [r{{[0-9]+}}] | 73 ; ARM32-DAG: str r{{.*}}, [r{{[0-9]+}}] |
| 74 ; ARM32-DAG: str r{{.*}}, [{{.*}}, #4] | 74 ; ARM32-DAG: str r{{.*}}, [{{.*}}, #4] |
| 75 | 75 |
| 76 define void @from_int16() { | 76 define internal void @from_int16() { |
| 77 entry: | 77 entry: |
| 78 %__0 = bitcast [2 x i8]* @i16v to i16* | 78 %__0 = bitcast [2 x i8]* @i16v to i16* |
| 79 %v0 = load i16, i16* %__0, align 1 | 79 %v0 = load i16, i16* %__0, align 1 |
| 80 %v1 = trunc i16 %v0 to i8 | 80 %v1 = trunc i16 %v0 to i8 |
| 81 %__3 = bitcast [1 x i8]* @i8v to i8* | 81 %__3 = bitcast [1 x i8]* @i8v to i8* |
| 82 store i8 %v1, i8* %__3, align 1 | 82 store i8 %v1, i8* %__3, align 1 |
| 83 %v2 = sext i16 %v0 to i32 | 83 %v2 = sext i16 %v0 to i32 |
| 84 %__5 = bitcast [4 x i8]* @i32v to i32* | 84 %__5 = bitcast [4 x i8]* @i32v to i32* |
| 85 store i32 %v2, i32* %__5, align 1 | 85 store i32 %v2, i32* %__5, align 1 |
| 86 %v3 = sext i16 %v0 to i64 | 86 %v3 = sext i16 %v0 to i64 |
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| 103 ; ARM32: movw {{.*}}i8v | 103 ; ARM32: movw {{.*}}i8v |
| 104 ; ARM32: strb | 104 ; ARM32: strb |
| 105 ; ARM32: sxth | 105 ; ARM32: sxth |
| 106 ; ARM32: movw {{.*}}i32v | 106 ; ARM32: movw {{.*}}i32v |
| 107 ; ARM32: str r | 107 ; ARM32: str r |
| 108 ; ARM32: sxth | 108 ; ARM32: sxth |
| 109 ; ARM32: asr | 109 ; ARM32: asr |
| 110 ; ARM32: movw {{.*}}i64v | 110 ; ARM32: movw {{.*}}i64v |
| 111 ; ARM32: str r | 111 ; ARM32: str r |
| 112 | 112 |
| 113 define void @from_int32() { | 113 define internal void @from_int32() { |
| 114 entry: | 114 entry: |
| 115 %__0 = bitcast [4 x i8]* @i32v to i32* | 115 %__0 = bitcast [4 x i8]* @i32v to i32* |
| 116 %v0 = load i32, i32* %__0, align 1 | 116 %v0 = load i32, i32* %__0, align 1 |
| 117 %v1 = trunc i32 %v0 to i8 | 117 %v1 = trunc i32 %v0 to i8 |
| 118 %__3 = bitcast [1 x i8]* @i8v to i8* | 118 %__3 = bitcast [1 x i8]* @i8v to i8* |
| 119 store i8 %v1, i8* %__3, align 1 | 119 store i8 %v1, i8* %__3, align 1 |
| 120 %v2 = trunc i32 %v0 to i16 | 120 %v2 = trunc i32 %v0 to i16 |
| 121 %__5 = bitcast [2 x i8]* @i16v to i16* | 121 %__5 = bitcast [2 x i8]* @i16v to i16* |
| 122 store i16 %v2, i16* %__5, align 1 | 122 store i16 %v2, i16* %__5, align 1 |
| 123 %v3 = sext i32 %v0 to i64 | 123 %v3 = sext i32 %v0 to i64 |
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| 136 ; ARM32: movw {{.*}}i32v | 136 ; ARM32: movw {{.*}}i32v |
| 137 ; ARM32: ldr r | 137 ; ARM32: ldr r |
| 138 ; ARM32: movw {{.*}}i8v | 138 ; ARM32: movw {{.*}}i8v |
| 139 ; ARM32: strb | 139 ; ARM32: strb |
| 140 ; ARM32: movw {{.*}}i16v | 140 ; ARM32: movw {{.*}}i16v |
| 141 ; ARM32: strh | 141 ; ARM32: strh |
| 142 ; ARM32: asr | 142 ; ARM32: asr |
| 143 ; ARM32: movw {{.*}}i64v | 143 ; ARM32: movw {{.*}}i64v |
| 144 ; ARM32: str r | 144 ; ARM32: str r |
| 145 | 145 |
| 146 define void @from_int64() { | 146 define internal void @from_int64() { |
| 147 entry: | 147 entry: |
| 148 %__0 = bitcast [8 x i8]* @i64v to i64* | 148 %__0 = bitcast [8 x i8]* @i64v to i64* |
| 149 %v0 = load i64, i64* %__0, align 1 | 149 %v0 = load i64, i64* %__0, align 1 |
| 150 %v1 = trunc i64 %v0 to i8 | 150 %v1 = trunc i64 %v0 to i8 |
| 151 %__3 = bitcast [1 x i8]* @i8v to i8* | 151 %__3 = bitcast [1 x i8]* @i8v to i8* |
| 152 store i8 %v1, i8* %__3, align 1 | 152 store i8 %v1, i8* %__3, align 1 |
| 153 %v2 = trunc i64 %v0 to i16 | 153 %v2 = trunc i64 %v0 to i16 |
| 154 %__5 = bitcast [2 x i8]* @i16v to i16* | 154 %__5 = bitcast [2 x i8]* @i16v to i16* |
| 155 store i16 %v2, i16* %__5, align 1 | 155 store i16 %v2, i16* %__5, align 1 |
| 156 %v3 = trunc i64 %v0 to i32 | 156 %v3 = trunc i64 %v0 to i32 |
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| 167 ; ARM32-LABEL: from_int64 | 167 ; ARM32-LABEL: from_int64 |
| 168 ; ARM32: movw {{.*}}i64v | 168 ; ARM32: movw {{.*}}i64v |
| 169 ; ARM32: ldr r | 169 ; ARM32: ldr r |
| 170 ; ARM32: movw {{.*}}i8v | 170 ; ARM32: movw {{.*}}i8v |
| 171 ; ARM32: strb | 171 ; ARM32: strb |
| 172 ; ARM32: movw {{.*}}i16v | 172 ; ARM32: movw {{.*}}i16v |
| 173 ; ARM32: strh | 173 ; ARM32: strh |
| 174 ; ARM32: movw {{.*}}i32v | 174 ; ARM32: movw {{.*}}i32v |
| 175 ; ARM32: str r | 175 ; ARM32: str r |
| 176 | 176 |
| 177 define void @from_uint8() { | 177 define internal void @from_uint8() { |
| 178 entry: | 178 entry: |
| 179 %__0 = bitcast [1 x i8]* @u8v to i8* | 179 %__0 = bitcast [1 x i8]* @u8v to i8* |
| 180 %v0 = load i8, i8* %__0, align 1 | 180 %v0 = load i8, i8* %__0, align 1 |
| 181 %v1 = zext i8 %v0 to i16 | 181 %v1 = zext i8 %v0 to i16 |
| 182 %__3 = bitcast [2 x i8]* @i16v to i16* | 182 %__3 = bitcast [2 x i8]* @i16v to i16* |
| 183 store i16 %v1, i16* %__3, align 1 | 183 store i16 %v1, i16* %__3, align 1 |
| 184 %v2 = zext i8 %v0 to i32 | 184 %v2 = zext i8 %v0 to i32 |
| 185 %__5 = bitcast [4 x i8]* @i32v to i32* | 185 %__5 = bitcast [4 x i8]* @i32v to i32* |
| 186 store i32 %v2, i32* %__5, align 1 | 186 store i32 %v2, i32* %__5, align 1 |
| 187 %v3 = zext i8 %v0 to i64 | 187 %v3 = zext i8 %v0 to i64 |
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| 206 ; ARM32: movw {{.*}}i16v | 206 ; ARM32: movw {{.*}}i16v |
| 207 ; ARM32: strh | 207 ; ARM32: strh |
| 208 ; ARM32: uxtb | 208 ; ARM32: uxtb |
| 209 ; ARM32: movw {{.*}}i32v | 209 ; ARM32: movw {{.*}}i32v |
| 210 ; ARM32: str r | 210 ; ARM32: str r |
| 211 ; ARM32: uxtb | 211 ; ARM32: uxtb |
| 212 ; ARM32: mov {{.*}}, #0 | 212 ; ARM32: mov {{.*}}, #0 |
| 213 ; ARM32: movw {{.*}}i64v | 213 ; ARM32: movw {{.*}}i64v |
| 214 ; ARM32: str r | 214 ; ARM32: str r |
| 215 | 215 |
| 216 define void @from_uint16() { | 216 define internal void @from_uint16() { |
| 217 entry: | 217 entry: |
| 218 %__0 = bitcast [2 x i8]* @u16v to i16* | 218 %__0 = bitcast [2 x i8]* @u16v to i16* |
| 219 %v0 = load i16, i16* %__0, align 1 | 219 %v0 = load i16, i16* %__0, align 1 |
| 220 %v1 = trunc i16 %v0 to i8 | 220 %v1 = trunc i16 %v0 to i8 |
| 221 %__3 = bitcast [1 x i8]* @i8v to i8* | 221 %__3 = bitcast [1 x i8]* @i8v to i8* |
| 222 store i8 %v1, i8* %__3, align 1 | 222 store i8 %v1, i8* %__3, align 1 |
| 223 %v2 = zext i16 %v0 to i32 | 223 %v2 = zext i16 %v0 to i32 |
| 224 %__5 = bitcast [4 x i8]* @i32v to i32* | 224 %__5 = bitcast [4 x i8]* @i32v to i32* |
| 225 store i32 %v2, i32* %__5, align 1 | 225 store i32 %v2, i32* %__5, align 1 |
| 226 %v3 = zext i16 %v0 to i64 | 226 %v3 = zext i16 %v0 to i64 |
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| 243 ; ARM32: movw {{.*}}i8v | 243 ; ARM32: movw {{.*}}i8v |
| 244 ; ARM32: strb | 244 ; ARM32: strb |
| 245 ; ARM32: uxth | 245 ; ARM32: uxth |
| 246 ; ARM32: movw {{.*}}i32v | 246 ; ARM32: movw {{.*}}i32v |
| 247 ; ARM32: str r | 247 ; ARM32: str r |
| 248 ; ARM32: uxth | 248 ; ARM32: uxth |
| 249 ; ARM32: mov {{.*}}, #0 | 249 ; ARM32: mov {{.*}}, #0 |
| 250 ; ARM32: movw {{.*}}i64v | 250 ; ARM32: movw {{.*}}i64v |
| 251 ; ARM32: str r | 251 ; ARM32: str r |
| 252 | 252 |
| 253 define void @from_uint32() { | 253 define internal void @from_uint32() { |
| 254 entry: | 254 entry: |
| 255 %__0 = bitcast [4 x i8]* @u32v to i32* | 255 %__0 = bitcast [4 x i8]* @u32v to i32* |
| 256 %v0 = load i32, i32* %__0, align 1 | 256 %v0 = load i32, i32* %__0, align 1 |
| 257 %v1 = trunc i32 %v0 to i8 | 257 %v1 = trunc i32 %v0 to i8 |
| 258 %__3 = bitcast [1 x i8]* @i8v to i8* | 258 %__3 = bitcast [1 x i8]* @i8v to i8* |
| 259 store i8 %v1, i8* %__3, align 1 | 259 store i8 %v1, i8* %__3, align 1 |
| 260 %v2 = trunc i32 %v0 to i16 | 260 %v2 = trunc i32 %v0 to i16 |
| 261 %__5 = bitcast [2 x i8]* @i16v to i16* | 261 %__5 = bitcast [2 x i8]* @i16v to i16* |
| 262 store i16 %v2, i16* %__5, align 1 | 262 store i16 %v2, i16* %__5, align 1 |
| 263 %v3 = zext i32 %v0 to i64 | 263 %v3 = zext i32 %v0 to i64 |
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| 276 ; ARM32: movw {{.*}}u32v | 276 ; ARM32: movw {{.*}}u32v |
| 277 ; ARM32: ldr r | 277 ; ARM32: ldr r |
| 278 ; ARM32: movw {{.*}}i8v | 278 ; ARM32: movw {{.*}}i8v |
| 279 ; ARM32: strb | 279 ; ARM32: strb |
| 280 ; ARM32: movw {{.*}}i16v | 280 ; ARM32: movw {{.*}}i16v |
| 281 ; ARM32: strh | 281 ; ARM32: strh |
| 282 ; ARM32: mov {{.*}}, #0 | 282 ; ARM32: mov {{.*}}, #0 |
| 283 ; ARM32: movw {{.*}}i64v | 283 ; ARM32: movw {{.*}}i64v |
| 284 ; ARM32: str r | 284 ; ARM32: str r |
| 285 | 285 |
| 286 define void @from_uint64() { | 286 define internal void @from_uint64() { |
| 287 entry: | 287 entry: |
| 288 %__0 = bitcast [8 x i8]* @u64v to i64* | 288 %__0 = bitcast [8 x i8]* @u64v to i64* |
| 289 %v0 = load i64, i64* %__0, align 1 | 289 %v0 = load i64, i64* %__0, align 1 |
| 290 %v1 = trunc i64 %v0 to i8 | 290 %v1 = trunc i64 %v0 to i8 |
| 291 %__3 = bitcast [1 x i8]* @i8v to i8* | 291 %__3 = bitcast [1 x i8]* @i8v to i8* |
| 292 store i8 %v1, i8* %__3, align 1 | 292 store i8 %v1, i8* %__3, align 1 |
| 293 %v2 = trunc i64 %v0 to i16 | 293 %v2 = trunc i64 %v0 to i16 |
| 294 %__5 = bitcast [2 x i8]* @i16v to i16* | 294 %__5 = bitcast [2 x i8]* @i16v to i16* |
| 295 store i16 %v2, i16* %__5, align 1 | 295 store i16 %v2, i16* %__5, align 1 |
| 296 %v3 = trunc i64 %v0 to i32 | 296 %v3 = trunc i64 %v0 to i32 |
| 297 %__7 = bitcast [4 x i8]* @i32v to i32* | 297 %__7 = bitcast [4 x i8]* @i32v to i32* |
| 298 store i32 %v3, i32* %__7, align 1 | 298 store i32 %v3, i32* %__7, align 1 |
| 299 ret void | 299 ret void |
| 300 } | 300 } |
| 301 ; CHECK-LABEL: from_uint64 | 301 ; CHECK-LABEL: from_uint64 |
| 302 ; CHECK: 0x0 {{.*}} u64v | 302 ; CHECK: 0x0 {{.*}} u64v |
| 303 ; CHECK: 0x0,{{.*}} i8v | 303 ; CHECK: 0x0,{{.*}} i8v |
| 304 ; CHECK: 0x0,{{.*}} i16v | 304 ; CHECK: 0x0,{{.*}} i16v |
| 305 ; CHECK: 0x0,{{.*}} i32v | 305 ; CHECK: 0x0,{{.*}} i32v |
| 306 | 306 |
| 307 ; ARM32-LABEL: from_uint64 | 307 ; ARM32-LABEL: from_uint64 |
| 308 ; ARM32: movw {{.*}}u64v | 308 ; ARM32: movw {{.*}}u64v |
| 309 ; ARM32: ldr r | 309 ; ARM32: ldr r |
| 310 ; ARM32: movw {{.*}}i8v | 310 ; ARM32: movw {{.*}}i8v |
| 311 ; ARM32: strb | 311 ; ARM32: strb |
| 312 ; ARM32: movw {{.*}}i16v | 312 ; ARM32: movw {{.*}}i16v |
| 313 ; ARM32: strh | 313 ; ARM32: strh |
| 314 ; ARM32: movw {{.*}}i32v | 314 ; ARM32: movw {{.*}}i32v |
| 315 ; ARM32: str r | 315 ; ARM32: str r |
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