Subzero: Fix nondeterministic behavior in constant pool creation.

src/IceTargetLoweringARM32.h

 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 237 matching lines @@
   }
   /// _ldr, for all your memory to Variable data moves. It handles all types
   /// (integer, floating point, and vectors.) Addr needs to be valid for Dest's
   /// type (e.g., no immediates for vector loads, and no index registers for fp
   /// loads.)
   void _ldr(Variable *Dest, OperandARM32Mem *Addr,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Ldr::create(Func, Dest, Addr, Pred));
   }
   void _ldrex(Variable *Dest, OperandARM32Mem *Addr,
-             CondARM32::Cond Pred = CondARM32::AL) {
-   Context.insert(InstARM32Ldrex::create(Func, Dest, Addr, Pred));
-   if (auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest)) {
-     Context.insert(InstFakeDef::create(Func, Dest64->getLo(), Dest));
-     Context.insert(InstFakeDef::create(Func, Dest64->getHi(), Dest));
-   }
- }
+              CondARM32::Cond Pred = CondARM32::AL) {
+    Context.insert(InstARM32Ldrex::create(Func, Dest, Addr, Pred));
+    if (auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest)) {
+      Context.insert(InstFakeDef::create(Func, Dest64->getLo(), Dest));
+      Context.insert(InstFakeDef::create(Func, Dest64->getHi(), Dest));
+    }
+  }
   void _lsl(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred));
   }
   void _lsr(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Lsr::create(Func, Dest, Src0, Src1, Pred));
   }
   void _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc,
             CondARM32::Cond Pred = CondARM32::AL) {
@@ skipping 297 matching lines @@
 
 private:
   ~TargetHeaderARM32() = default;
 
   TargetARM32Features CPUFeatures;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H