tests_lit/llvm2ice_tests/callindirect.pnacl.ll - Issue 1385433002: Subzero: Use register availability during lowering to improve the code.

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Issue 1385433002: Subzero: Use register availability during lowering to improve the code. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Add comments Created 5 years, 2 months ago

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1 ; Test of multiple indirect calls to the same target. Each call	1 ; Test of multiple indirect calls to the same target. Each call

2 ; should be to the same operand, whether it's in a register or on the	2 ; should be to the same operand, whether it's in a register or on the

3 ; stack.	3 ; stack.

4	4

5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \	5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \

6 ; RUN: --target x8632 -i %s --args -O2 \	6 ; RUN: --target x8632 -i %s --args -O2 \

7 ; RUN: \| %if --need=target_X8632 --command FileCheck %s	7 ; RUN: \| %if --need=target_X8632 --command FileCheck %s

8 ; RUN: %if --need=allow_dump --need=target_X8632 --command %p2i --filetype=asm \	8 ; RUN: %if --need=allow_dump --need=target_X8632 --command %p2i --filetype=asm \

9 ; RUN: --assemble --disassemble -i %s --args -O2 \	9 ; RUN: --assemble --disassemble -i %s --args -O2 \

10 ; RUN: \| %if --need=allow_dump --need=target_X8632 --command FileCheck %s	10 ; RUN: \| %if --need=allow_dump --need=target_X8632 --command FileCheck %s

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70 %fp_ptr_i32 = bitcast [4 x i8]* @fp_v to i32*	70 %fp_ptr_i32 = bitcast [4 x i8]* @fp_v to i32*

71 %fp_ptr = load i32, i32* %fp_ptr_i32, align 1	71 %fp_ptr = load i32, i32* %fp_ptr_i32, align 1

72 %fp = inttoptr i32 %fp_ptr to void ()*	72 %fp = inttoptr i32 %fp_ptr to void ()*

73 call void %fp()	73 call void %fp()

74 call void %fp()	74 call void %fp()

75 call void %fp()	75 call void %fp()

76 call void %fp()	76 call void %fp()

77 ret void	77 ret void

78 }	78 }

79 ; CHECK-LABEL: CallIndirectGlobal	79 ; CHECK-LABEL: CallIndirectGlobal

	80 ; Allow the first call to be to a different register because of simple

	81 ; availability optimization.

	82 ; CHECK: call

80 ; CHECK: call [[REGISTER:[a-z]+]]	83 ; CHECK: call [[REGISTER:[a-z]+]]

81 ; CHECK: call [[REGISTER]]	84 ; CHECK: call [[REGISTER]]

82 ; CHECK: call [[REGISTER]]	85 ; CHECK: call [[REGISTER]]

83 ; CHECK: call [[REGISTER]]

84 ;	86 ;

85 ; OPTM1-LABEL: CallIndirectGlobal	87 ; OPTM1-LABEL: CallIndirectGlobal

86 ; OPTM1: call [[TARGET:.+]]	88 ; OPTM1: call [[TARGET:.+]]

87 ; OPTM1: call [[TARGET]]	89 ; OPTM1: call [[TARGET]]

88 ; OPTM1: call [[TARGET]]	90 ; OPTM1: call [[TARGET]]

89 ; OPTM1: call [[TARGET]]	91 ; OPTM1: call [[TARGET]]

90 ;	92 ;

91 ; ARM32-LABEL: CallIndirectGlobal	93 ; ARM32-LABEL: CallIndirectGlobal

92 ; ARM32: blx [[REGISTER:r.*]]	94 ; ARM32: blx [[REGISTER:r.*]]

93 ; ARM32: blx [[REGISTER]]	95 ; ARM32: blx [[REGISTER]]

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117 ; OPTM1: e8 bc 03 01 00 call {{[0-9a-f]+}} {{.}} R_386_PC32 ABS*	119 ; OPTM1: e8 bc 03 01 00 call {{[0-9a-f]+}} {{.}} R_386_PC32 ABS*

118 ;	120 ;

119 ; ARM32-LABEL: CallConst	121 ; ARM32-LABEL: CallConst

120 ; ARM32: movw [[REGISTER:r.*]], #960	122 ; ARM32: movw [[REGISTER:r.*]], #960

121 ; ARM32: movt [[REGISTER]], #1	123 ; ARM32: movt [[REGISTER]], #1

122 ; ARM32: blx [[REGISTER]]	124 ; ARM32: blx [[REGISTER]]

123 ; The legalization of the constant could be shared, but it isn't.	125 ; The legalization of the constant could be shared, but it isn't.

124 ; ARM32: movw [[REGISTER:r.*]], #960	126 ; ARM32: movw [[REGISTER:r.*]], #960

125 ; ARM32: blx [[REGISTER]]	127 ; ARM32: blx [[REGISTER]]

126 ; ARM32: blx [[REGISTER]]	128 ; ARM32: blx [[REGISTER]]

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