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Side by Side Diff: src/IceCfgNode.cpp

Issue 1385433002: Subzero: Use register availability during lowering to improve the code. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add comments Created 5 years, 2 months ago
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1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// 1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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563 Context.init(this); 563 Context.init(this);
564 Target->initNodeForLowering(this); 564 Target->initNodeForLowering(this);
565 while (!Context.atEnd()) { 565 while (!Context.atEnd()) {
566 InstList::iterator Orig = Context.getCur(); 566 InstList::iterator Orig = Context.getCur();
567 if (llvm::isa<InstRet>(*Orig)) 567 if (llvm::isa<InstRet>(*Orig))
568 setHasReturn(); 568 setHasReturn();
569 Target->lower(); 569 Target->lower();
570 // Ensure target lowering actually moved the cursor. 570 // Ensure target lowering actually moved the cursor.
571 assert(Context.getCur() != Orig); 571 assert(Context.getCur() != Orig);
572 } 572 }
573 Context.availabilityReset();
573 // Do preliminary lowering of the Phi instructions. 574 // Do preliminary lowering of the Phi instructions.
574 Target->prelowerPhis(); 575 Target->prelowerPhis();
575 } 576 }
576 577
577 void CfgNode::livenessLightweight() { 578 void CfgNode::livenessLightweight() {
578 SizeT NumVars = Func->getNumVariables(); 579 SizeT NumVars = Func->getNumVariables();
579 LivenessBV Live(NumVars); 580 LivenessBV Live(NumVars);
580 // Process regular instructions in reverse order. 581 // Process regular instructions in reverse order.
581 for (Inst &I : reverse_range(Insts)) { 582 for (Inst &I : reverse_range(Insts)) {
582 if (I.isDeleted()) 583 if (I.isDeleted())
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676 bool LiveInChanged = (Live != LiveIn); 677 bool LiveInChanged = (Live != LiveIn);
677 Changed = (NumNonDeadPhis != PrevNumNonDeadPhis || LiveInChanged); 678 Changed = (NumNonDeadPhis != PrevNumNonDeadPhis || LiveInChanged);
678 if (LiveInChanged) 679 if (LiveInChanged)
679 LiveIn = Live; 680 LiveIn = Live;
680 PrevNumNonDeadPhis = NumNonDeadPhis; 681 PrevNumNonDeadPhis = NumNonDeadPhis;
681 return Changed; 682 return Changed;
682 } 683 }
683 684
684 // Validate the integrity of the live ranges in this block. If there are any 685 // Validate the integrity of the live ranges in this block. If there are any
685 // errors, it prints details and returns false. On success, it returns true. 686 // errors, it prints details and returns false. On success, it returns true.
686 bool CfgNode::livenessValidateIntervals(Liveness *Liveness) { 687 bool CfgNode::livenessValidateIntervals(Liveness *Liveness) const {
687 if (!BuildDefs::asserts()) 688 if (!BuildDefs::asserts())
688 return true; 689 return true;
689 690
690 // Verify there are no duplicates. 691 // Verify there are no duplicates.
691 auto ComparePair = 692 auto ComparePair =
692 [](const LiveBeginEndMapEntry &A, const LiveBeginEndMapEntry &B) { 693 [](const LiveBeginEndMapEntry &A, const LiveBeginEndMapEntry &B) {
693 return A.first == B.first; 694 return A.first == B.first;
694 }; 695 };
695 LiveBeginEndMap &MapBegin = *Liveness->getLiveBegin(this); 696 LiveBeginEndMap &MapBegin = *Liveness->getLiveBegin(this);
696 LiveBeginEndMap &MapEnd = *Liveness->getLiveEnd(this); 697 LiveBeginEndMap &MapEnd = *Liveness->getLiveEnd(this);
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1353 InstIntrinsicCall *Inst = InstIntrinsicCall::create( 1354 InstIntrinsicCall *Inst = InstIntrinsicCall::create(
1354 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); 1355 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
1355 Inst->addArg(AtomicRMWOp); 1356 Inst->addArg(AtomicRMWOp);
1356 Inst->addArg(Counter); 1357 Inst->addArg(Counter);
1357 Inst->addArg(One); 1358 Inst->addArg(One);
1358 Inst->addArg(OrderAcquireRelease); 1359 Inst->addArg(OrderAcquireRelease);
1359 Insts.push_front(Inst); 1360 Insts.push_front(Inst);
1360 } 1361 }
1361 1362
1362 } // end of namespace Ice 1363 } // end of namespace Ice
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