OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
(...skipping 371 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
382 ASSERT(!src1.is(src3)); | 382 ASSERT(!src1.is(src3)); |
383 if (src1.code() > src2.code()) { | 383 if (src1.code() > src2.code()) { |
384 if (src2.code() > src3.code()) { | 384 if (src2.code() > src3.code()) { |
385 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond); | 385 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond); |
386 } else { | 386 } else { |
387 ldr(src3, MemOperand(sp, 4, PostIndex), cond); | 387 ldr(src3, MemOperand(sp, 4, PostIndex), cond); |
388 ldm(ia_w, sp, src1.bit() | src2.bit(), cond); | 388 ldm(ia_w, sp, src1.bit() | src2.bit(), cond); |
389 } | 389 } |
390 } else { | 390 } else { |
391 Pop(src2, src3, cond); | 391 Pop(src2, src3, cond); |
392 str(src1, MemOperand(sp, 4, PostIndex), cond); | 392 ldr(src1, MemOperand(sp, 4, PostIndex), cond); |
393 } | 393 } |
394 } | 394 } |
395 | 395 |
396 // Pop four registers. Pops rightmost register first (from lower address). | 396 // Pop four registers. Pops rightmost register first (from lower address). |
397 void Pop(Register src1, | 397 void Pop(Register src1, |
398 Register src2, | 398 Register src2, |
399 Register src3, | 399 Register src3, |
400 Register src4, | 400 Register src4, |
401 Condition cond = al) { | 401 Condition cond = al) { |
402 ASSERT(!src1.is(src2)); | 402 ASSERT(!src1.is(src2)); |
(...skipping 1151 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1554 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 1554 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
1555 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1555 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
1556 #else | 1556 #else |
1557 #define ACCESS_MASM(masm) masm-> | 1557 #define ACCESS_MASM(masm) masm-> |
1558 #endif | 1558 #endif |
1559 | 1559 |
1560 | 1560 |
1561 } } // namespace v8::internal | 1561 } } // namespace v8::internal |
1562 | 1562 |
1563 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ | 1563 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ |
OLD | NEW |