PPC: Remove register index/code indirection

src/ppc/deoptimizer-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/codegen.h"
 #include "src/deoptimizer.h"
 #include "src/full-codegen/full-codegen.h"
+#include "src/register-configuration.h"
 #include "src/safepoint-table.h"
 
 namespace v8 {
 namespace internal {
 
 const int Deoptimizer::table_entry_size_ = 8;
 
 
 int Deoptimizer::patch_size() {
 #if V8_TARGET_ARCH_PPC64
@@ skipping 74 matching lines @@
   // spilled. Registers fp and sp are set to the correct values though.
   // We ensure the values are Smis to avoid confusing the garbage
   // collector in the event that any values are retreived and stored
   // elsewhere.
 
   for (int i = 0; i < Register::kNumRegisters; i++) {
     input_->SetRegister(i, reinterpret_cast<intptr_t>(Smi::FromInt(i)));
   }
   input_->SetRegister(sp.code(), reinterpret_cast<intptr_t>(frame->sp()));
   input_->SetRegister(fp.code(), reinterpret_cast<intptr_t>(frame->fp()));
-  for (int i = 0; i < DoubleRegister::NumAllocatableRegisters(); i++) {
+  for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
     input_->SetDoubleRegister(i, 0.0);
   }
 
   // Fill the frame content from the actual data on the frame.
   for (unsigned i = 0; i < input_->GetFrameSize(); i += kPointerSize) {
     input_->SetFrameSlot(
         i, reinterpret_cast<intptr_t>(Memory::Address_at(tos + i)));
   }
 }
 
 
 void Deoptimizer::SetPlatformCompiledStubRegisters(
     FrameDescription* output_frame, CodeStubDescriptor* descriptor) {
   ApiFunction function(descriptor->deoptimization_handler());
   ExternalReference xref(&function, ExternalReference::BUILTIN_CALL, isolate_);
   intptr_t handler = reinterpret_cast<intptr_t>(xref.address());
   int params = descriptor->GetHandlerParameterCount();
   output_frame->SetRegister(r3.code(), params);
   output_frame->SetRegister(r4.code(), handler);
 }
 
 
 void Deoptimizer::CopyDoubleRegisters(FrameDescription* output_frame) {
-  for (int i = 0; i < DoubleRegister::kMaxNumRegisters; ++i) {
+  for (int i = 0; i < DoubleRegister::kNumRegisters; ++i) {
     double double_value = input_->GetDoubleRegister(i);
     output_frame->SetDoubleRegister(i, double_value);
   }
 }
 
 
 bool Deoptimizer::HasAlignmentPadding(JSFunction* function) {
   // There is no dynamic alignment padding on PPC in the input frame.
   return false;
 }
 
 
 #define __ masm()->
 
 // This code tries to be close to ia32 code so that any changes can be
 // easily ported.
 void Deoptimizer::TableEntryGenerator::Generate() {
   GeneratePrologue();
 
   // Unlike on ARM we don't save all the registers, just the useful ones.
   // For the rest, there are gaps on the stack, so the offsets remain the same.
   const int kNumberOfRegisters = Register::kNumRegisters;
 
   RegList restored_regs = kJSCallerSaved | kCalleeSaved;
   RegList saved_regs = restored_regs | sp.bit();
 
-  const int kDoubleRegsSize =
-      kDoubleSize * DoubleRegister::kMaxNumAllocatableRegisters;
+  const int kDoubleRegsSize = kDoubleSize * DoubleRegister::kNumRegisters;
 
-  // Save all FPU registers before messing with them.
+  // Save all double registers before messing with them.
   __ subi(sp, sp, Operand(kDoubleRegsSize));
-  for (int i = 0; i < DoubleRegister::kMaxNumAllocatableRegisters; ++i) {
-    DoubleRegister fpu_reg = DoubleRegister::FromAllocationIndex(i);
-    int offset = i * kDoubleSize;
-    __ stfd(fpu_reg, MemOperand(sp, offset));
+  const RegisterConfiguration* config = RegisterConfiguration::ArchDefault();
+  for (int i = 0; i < config->num_allocatable_double_registers(); ++i) {
+    int code = config->GetAllocatableDoubleCode(i);
+    const DoubleRegister dreg = DoubleRegister::from_code(code);
+    int offset = code * kDoubleSize;
+    __ stfd(dreg, MemOperand(sp, offset));
   }
 
   // Push saved_regs (needed to populate FrameDescription::registers_).
   // Leave gaps for other registers.
   __ subi(sp, sp, Operand(kNumberOfRegisters * kPointerSize));
   for (int16_t i = kNumberOfRegisters - 1; i >= 0; i--) {
     if ((saved_regs & (1 << i)) != 0) {
       __ StoreP(ToRegister(i), MemOperand(sp, kPointerSize * i));
     }
   }
@@ skipping 36 matching lines @@
 
   // Copy core registers into FrameDescription::registers_[kNumRegisters].
   DCHECK(Register::kNumRegisters == kNumberOfRegisters);
   for (int i = 0; i < kNumberOfRegisters; i++) {
     int offset = (i * kPointerSize) + FrameDescription::registers_offset();
     __ LoadP(r5, MemOperand(sp, i * kPointerSize));
     __ StoreP(r5, MemOperand(r4, offset));
   }
 
   int double_regs_offset = FrameDescription::double_registers_offset();
-  // Copy VFP registers to
-  // double_registers_[DoubleRegister::kNumAllocatableRegisters]
-  for (int i = 0; i < DoubleRegister::NumAllocatableRegisters(); ++i) {
-    int dst_offset = i * kDoubleSize + double_regs_offset;
-    int src_offset = i * kDoubleSize + kNumberOfRegisters * kPointerSize;
+  // Copy double registers to
+  // double_registers_[DoubleRegister::kNumRegisters]
+  for (int i = 0; i < config->num_allocatable_double_registers(); ++i) {
+    int code = config->GetAllocatableDoubleCode(i);
+    int dst_offset = code * kDoubleSize + double_regs_offset;
+    int src_offset = code * kDoubleSize + kNumberOfRegisters * kPointerSize;
     __ lfd(d0, MemOperand(sp, src_offset));
     __ stfd(d0, MemOperand(r4, dst_offset));
   }
 
   // Remove the bailout id and the saved registers from the stack.
   __ addi(sp, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
 
   // Compute a pointer to the unwinding limit in register r5; that is
   // the first stack slot not part of the input frame.
   __ LoadP(r5, MemOperand(r4, FrameDescription::frame_size_offset()));
@@ skipping 51 matching lines @@
   __ bind(&inner_loop_header);
   __ cmpi(r6, Operand::Zero());
   __ bne(&inner_push_loop);  // test for gt?
 
   __ addi(r7, r7, Operand(kPointerSize));
   __ bind(&outer_loop_header);
   __ cmp(r7, r4);
   __ blt(&outer_push_loop);
 
   __ LoadP(r4, MemOperand(r3, Deoptimizer::input_offset()));
-  for (int i = 0; i < DoubleRegister::kMaxNumAllocatableRegisters; ++i) {
-    const DoubleRegister dreg = DoubleRegister::FromAllocationIndex(i);
-    int src_offset = i * kDoubleSize + double_regs_offset;
+  for (int i = 0; i < config->num_allocatable_double_registers(); ++i) {
+    int code = config->GetAllocatableDoubleCode(i);
+    const DoubleRegister dreg = DoubleRegister::from_code(code);
+    int src_offset = code * kDoubleSize + double_regs_offset;
     __ lfd(dreg, MemOperand(r4, src_offset));
   }
 
   // Push state, pc, and continuation from the last output frame.
   __ LoadP(r9, MemOperand(r5, FrameDescription::state_offset()));
   __ push(r9);
   __ LoadP(r9, MemOperand(r5, FrameDescription::pc_offset()));
   __ push(r9);
   __ LoadP(r9, MemOperand(r5, FrameDescription::continuation_offset()));
   __ push(r9);
@@ skipping 48 matching lines @@
 
 void FrameDescription::SetCallerConstantPool(unsigned offset, intptr_t value) {
   DCHECK(FLAG_enable_embedded_constant_pool);
   SetFrameSlot(offset, value);
 }
 
 
 #undef __
 }  // namespace internal
 }  // namespace v8