Index: src/mips64/macro-assembler-mips64.cc |
diff --git a/src/mips64/macro-assembler-mips64.cc b/src/mips64/macro-assembler-mips64.cc |
index 8f4db303d27f6a651d0a874f542afd405ea593a3..26229c9d8725c55cdf750f3cd3dbda3c827038db 100644 |
--- a/src/mips64/macro-assembler-mips64.cc |
+++ b/src/mips64/macro-assembler-mips64.cc |
@@ -11,7 +11,6 @@ |
#include "src/codegen.h" |
#include "src/debug/debug.h" |
#include "src/mips64/macro-assembler-mips64.h" |
-#include "src/register-configuration.h" |
#include "src/runtime/runtime.h" |
namespace v8 { |
@@ -149,7 +148,7 @@ |
MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) { |
UNIMPLEMENTED_MIPS(); |
// General purpose registers are pushed last on the stack. |
- int doubles_size = DoubleRegister::kMaxNumRegisters * kDoubleSize; |
+ int doubles_size = FPURegister::NumAllocatableRegisters() * kDoubleSize; |
int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize; |
return MemOperand(sp, doubles_size + register_offset); |
} |
@@ -3762,7 +3761,7 @@ |
// Find a temp register in temps list. |
for (int i = 0; i < kNumRegisters; i++) { |
if ((temps & (1 << i)) != 0) { |
- tmp.reg_code = i; |
+ tmp.code_ = i; |
break; |
} |
} |
@@ -6043,10 +6042,8 @@ |
if (reg5.is_valid()) regs |= reg5.bit(); |
if (reg6.is_valid()) regs |= reg6.bit(); |
- const RegisterConfiguration* config = RegisterConfiguration::ArchDefault(); |
- for (int i = 0; i < config->num_allocatable_general_registers(); ++i) { |
- int code = config->GetAllocatableGeneralCode(i); |
- Register candidate = Register::from_code(code); |
+ for (int i = 0; i < Register::NumAllocatableRegisters(); i++) { |
+ Register candidate = Register::FromAllocationIndex(i); |
if (regs & candidate.bit()) continue; |
return candidate; |
} |