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| 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// | 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 739 if (!BuildDefs::dump()) | 739 if (!BuildDefs::dump()) |
| 740 return; | 740 return; |
| 741 Ostream &Str = Ctx->getStrEmit(); | 741 Ostream &Str = Ctx->getStrEmit(); |
| 742 if (Var->hasReg()) { | 742 if (Var->hasReg()) { |
| 743 Str << "%" << getRegName(Var->getRegNum(), Var->getType()); | 743 Str << "%" << getRegName(Var->getRegNum(), Var->getType()); |
| 744 return; | 744 return; |
| 745 } | 745 } |
| 746 if (Var->mustHaveReg()) { | 746 if (Var->mustHaveReg()) { |
| 747 llvm_unreachable("Infinite-weight Variable has no register assigned"); | 747 llvm_unreachable("Infinite-weight Variable has no register assigned"); |
| 748 } | 748 } |
| 749 int32_t Offset = Var->getStackOffset(); | 749 const int32_t Offset = Var->getStackOffset(); |
| 750 int32_t OffsetAdj = 0; |
| 750 int32_t BaseRegNum = Var->getBaseRegNum(); | 751 int32_t BaseRegNum = Var->getBaseRegNum(); |
| 751 if (BaseRegNum == Variable::NoRegister) { | 752 if (BaseRegNum == Variable::NoRegister) { |
| 752 BaseRegNum = getFrameOrStackReg(); | 753 BaseRegNum = getFrameOrStackReg(); |
| 753 if (!hasFramePointer()) | 754 if (!hasFramePointer()) |
| 754 Offset += getStackAdjustment(); | 755 OffsetAdj = getStackAdjustment(); |
| 755 } | 756 } |
| 756 if (Offset) | 757 // Print in the form "OffsetAdj+Offset(%reg)", taking care that: |
| 757 Str << Offset; | 758 // - OffsetAdj may be 0 |
| 759 // - Offset is never printed when it is 0 |
| 760 // - Offset may be positive or symbolic, so a "+" might be needed |
| 761 |
| 762 // Only print nonzero OffsetAdj. |
| 763 if (OffsetAdj) { |
| 764 Str << OffsetAdj; |
| 765 } |
| 766 const bool DecorateAsm = Func->getContext()->getFlags().getDecorateAsm(); |
| 767 // Only print Offset when it is nonzero, regardless of DecorateAsm. |
| 768 if (Offset) { |
| 769 if (OffsetAdj && (DecorateAsm || Offset > 0)) { |
| 770 Str << "+"; |
| 771 } |
| 772 if (DecorateAsm) { |
| 773 Str << Var->getSymbolicStackOffset(Func); |
| 774 } else { |
| 775 Str << Offset; |
| 776 } |
| 777 } |
| 758 const Type FrameSPTy = Traits::WordType; | 778 const Type FrameSPTy = Traits::WordType; |
| 759 Str << "(%" << getRegName(BaseRegNum, FrameSPTy) << ")"; | 779 Str << "(%" << getRegName(BaseRegNum, FrameSPTy) << ")"; |
| 760 } | 780 } |
| 761 | 781 |
| 762 template <class Machine> | 782 template <class Machine> |
| 763 typename TargetX86Base<Machine>::Traits::Address | 783 typename TargetX86Base<Machine>::Traits::Address |
| 764 TargetX86Base<Machine>::stackVarToAsmOperand(const Variable *Var) const { | 784 TargetX86Base<Machine>::stackVarToAsmOperand(const Variable *Var) const { |
| 765 if (Var->hasReg()) | 785 if (Var->hasReg()) |
| 766 llvm_unreachable("Stack Variable has a register assigned"); | 786 llvm_unreachable("Stack Variable has a register assigned"); |
| 767 if (Var->mustHaveReg()) { | 787 if (Var->mustHaveReg()) { |
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| 5456 } | 5476 } |
| 5457 // the offset is not eligible for blinding or pooling, return the original | 5477 // the offset is not eligible for blinding or pooling, return the original |
| 5458 // mem operand | 5478 // mem operand |
| 5459 return MemOperand; | 5479 return MemOperand; |
| 5460 } | 5480 } |
| 5461 | 5481 |
| 5462 } // end of namespace X86Internal | 5482 } // end of namespace X86Internal |
| 5463 } // end of namespace Ice | 5483 } // end of namespace Ice |
| 5464 | 5484 |
| 5465 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H | 5485 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H |
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