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| 1 /* | 1 /* |
| 2 * Copyright 2011 The LibYuv Project Authors. All rights reserved. | 2 * Copyright 2011 The LibYuv Project Authors. All rights reserved. |
| 3 * | 3 * |
| 4 * Use of this source code is governed by a BSD-style license | 4 * Use of this source code is governed by a BSD-style license |
| 5 * that can be found in the LICENSE file in the root of the source | 5 * that can be found in the LICENSE file in the root of the source |
| 6 * tree. An additional intellectual property rights grant can be found | 6 * tree. An additional intellectual property rights grant can be found |
| 7 * in the file PATENTS. All contributing project authors may | 7 * in the file PATENTS. All contributing project authors may |
| 8 * be found in the AUTHORS file in the root of the source tree. | 8 * be found in the AUTHORS file in the root of the source tree. |
| 9 */ | 9 */ |
| 10 | 10 |
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| 383 #endif | 383 #endif |
| 384 #if defined(HAS_I422ALPHATOARGBROW_MIPS_DSPR2) | 384 #if defined(HAS_I422ALPHATOARGBROW_MIPS_DSPR2) |
| 385 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && | 385 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && |
| 386 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && | 386 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && |
| 387 IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && | 387 IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && |
| 388 IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && | 388 IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && |
| 389 IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { | 389 IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { |
| 390 I422AlphaToARGBRow = I422AlphaToARGBRow_MIPS_DSPR2; | 390 I422AlphaToARGBRow = I422AlphaToARGBRow_MIPS_DSPR2; |
| 391 } | 391 } |
| 392 #endif | 392 #endif |
| 393 #if defined(HAS_ARGBATTENUATEROW_SSE2) | |
| 394 if (TestCpuFlag(kCpuHasSSE2)) { | |
| 395 ARGBAttenuateRow = ARGBAttenuateRow_Any_SSE2; | |
| 396 if (IS_ALIGNED(width, 4)) { | |
| 397 ARGBAttenuateRow = ARGBAttenuateRow_SSE2; | |
| 398 } | |
| 399 } | |
| 400 #endif | |
| 401 #if defined(HAS_ARGBATTENUATEROW_SSSE3) | 393 #if defined(HAS_ARGBATTENUATEROW_SSSE3) |
| 402 if (TestCpuFlag(kCpuHasSSSE3)) { | 394 if (TestCpuFlag(kCpuHasSSSE3)) { |
| 403 ARGBAttenuateRow = ARGBAttenuateRow_Any_SSSE3; | 395 ARGBAttenuateRow = ARGBAttenuateRow_Any_SSSE3; |
| 404 if (IS_ALIGNED(width, 4)) { | 396 if (IS_ALIGNED(width, 4)) { |
| 405 ARGBAttenuateRow = ARGBAttenuateRow_SSSE3; | 397 ARGBAttenuateRow = ARGBAttenuateRow_SSSE3; |
| 406 } | 398 } |
| 407 } | 399 } |
| 408 #endif | 400 #endif |
| 409 #if defined(HAS_ARGBATTENUATEROW_AVX2) | 401 #if defined(HAS_ARGBATTENUATEROW_AVX2) |
| 410 if (TestCpuFlag(kCpuHasAVX2)) { | 402 if (TestCpuFlag(kCpuHasAVX2)) { |
| 411 ARGBAttenuateRow = ARGBAttenuateRow_Any_AVX2; | 403 ARGBAttenuateRow = ARGBAttenuateRow_Any_AVX2; |
| 412 if (IS_ALIGNED(width, 8)) { | 404 if (IS_ALIGNED(width, 8)) { |
| 413 ARGBAttenuateRow = ARGBAttenuateRow_AVX2; | 405 ARGBAttenuateRow = ARGBAttenuateRow_AVX2; |
| 414 } | 406 } |
| 415 } | 407 } |
| 416 #endif | 408 #endif |
| 417 #if defined(HAS_ARGBATTENUATEROW_NEON) | 409 #if defined(HAS_ARGBATTENUATEROW_NEON) |
| 418 if (TestCpuFlag(kCpuHasNEON)) { | 410 if (TestCpuFlag(kCpuHasNEON)) { |
| 419 ARGBAttenuateRow = ARGBAttenuateRow_Any_NEON; | 411 ARGBAttenuateRow = ARGBAttenuateRow_Any_NEON; |
| 420 if (IS_ALIGNED(width, 8)) { | 412 if (IS_ALIGNED(width, 8)) { |
| 421 ARGBAttenuateRow = ARGBAttenuateRow_NEON; | 413 ARGBAttenuateRow = ARGBAttenuateRow_NEON; |
| 422 } | 414 } |
| 423 } | 415 } |
| 424 #endif | 416 #endif |
| 425 | 417 |
| 426 for (y = 0; y < height; ++y) { | 418 for (y = 0; y < height; ++y) { |
| 427 I422AlphaToARGBRow(src_y, src_u, src_v, src_a, dst_argb, &kYuvConstants, wid
th); | 419 I422AlphaToARGBRow(src_y, src_u, src_v, src_a, dst_argb, &kYuvConstants, |
| 420 width); |
| 428 if (attenuate) { | 421 if (attenuate) { |
| 429 ARGBAttenuateRow(dst_argb, dst_argb, width); | 422 ARGBAttenuateRow(dst_argb, dst_argb, width); |
| 430 } | 423 } |
| 431 dst_argb += dst_stride_argb; | 424 dst_argb += dst_stride_argb; |
| 432 src_a += src_stride_a; | 425 src_a += src_stride_a; |
| 433 src_y += src_stride_y; | 426 src_y += src_stride_y; |
| 434 if (y & 1) { | 427 if (y & 1) { |
| 435 src_u += src_stride_u; | 428 src_u += src_stride_u; |
| 436 src_v += src_stride_v; | 429 src_v += src_stride_v; |
| 437 } | 430 } |
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| 493 #endif | 486 #endif |
| 494 #if defined(HAS_I422ALPHATOABGRROW_MIPS_DSPR2) | 487 #if defined(HAS_I422ALPHATOABGRROW_MIPS_DSPR2) |
| 495 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && | 488 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && |
| 496 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && | 489 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && |
| 497 IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && | 490 IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && |
| 498 IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && | 491 IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && |
| 499 IS_ALIGNED(dst_abgr, 4) && IS_ALIGNED(dst_stride_abgr, 4)) { | 492 IS_ALIGNED(dst_abgr, 4) && IS_ALIGNED(dst_stride_abgr, 4)) { |
| 500 I422AlphaToABGRRow = I422AlphaToABGRRow_MIPS_DSPR2; | 493 I422AlphaToABGRRow = I422AlphaToABGRRow_MIPS_DSPR2; |
| 501 } | 494 } |
| 502 #endif | 495 #endif |
| 503 #if defined(HAS_ARGBATTENUATEROW_SSE2) | |
| 504 if (TestCpuFlag(kCpuHasSSE2)) { | |
| 505 ARGBAttenuateRow = ARGBAttenuateRow_Any_SSE2; | |
| 506 if (IS_ALIGNED(width, 4)) { | |
| 507 ARGBAttenuateRow = ARGBAttenuateRow_SSE2; | |
| 508 } | |
| 509 } | |
| 510 #endif | |
| 511 #if defined(HAS_ARGBATTENUATEROW_SSSE3) | 496 #if defined(HAS_ARGBATTENUATEROW_SSSE3) |
| 512 if (TestCpuFlag(kCpuHasSSSE3)) { | 497 if (TestCpuFlag(kCpuHasSSSE3)) { |
| 513 ARGBAttenuateRow = ARGBAttenuateRow_Any_SSSE3; | 498 ARGBAttenuateRow = ARGBAttenuateRow_Any_SSSE3; |
| 514 if (IS_ALIGNED(width, 4)) { | 499 if (IS_ALIGNED(width, 4)) { |
| 515 ARGBAttenuateRow = ARGBAttenuateRow_SSSE3; | 500 ARGBAttenuateRow = ARGBAttenuateRow_SSSE3; |
| 516 } | 501 } |
| 517 } | 502 } |
| 518 #endif | 503 #endif |
| 519 #if defined(HAS_ARGBATTENUATEROW_AVX2) | 504 #if defined(HAS_ARGBATTENUATEROW_AVX2) |
| 520 if (TestCpuFlag(kCpuHasAVX2)) { | 505 if (TestCpuFlag(kCpuHasAVX2)) { |
| 521 ARGBAttenuateRow = ARGBAttenuateRow_Any_AVX2; | 506 ARGBAttenuateRow = ARGBAttenuateRow_Any_AVX2; |
| 522 if (IS_ALIGNED(width, 8)) { | 507 if (IS_ALIGNED(width, 8)) { |
| 523 ARGBAttenuateRow = ARGBAttenuateRow_AVX2; | 508 ARGBAttenuateRow = ARGBAttenuateRow_AVX2; |
| 524 } | 509 } |
| 525 } | 510 } |
| 526 #endif | 511 #endif |
| 527 #if defined(HAS_ARGBATTENUATEROW_NEON) | 512 #if defined(HAS_ARGBATTENUATEROW_NEON) |
| 528 if (TestCpuFlag(kCpuHasNEON)) { | 513 if (TestCpuFlag(kCpuHasNEON)) { |
| 529 ARGBAttenuateRow = ARGBAttenuateRow_Any_NEON; | 514 ARGBAttenuateRow = ARGBAttenuateRow_Any_NEON; |
| 530 if (IS_ALIGNED(width, 8)) { | 515 if (IS_ALIGNED(width, 8)) { |
| 531 ARGBAttenuateRow = ARGBAttenuateRow_NEON; | 516 ARGBAttenuateRow = ARGBAttenuateRow_NEON; |
| 532 } | 517 } |
| 533 } | 518 } |
| 534 #endif | 519 #endif |
| 535 | 520 |
| 536 for (y = 0; y < height; ++y) { | 521 for (y = 0; y < height; ++y) { |
| 537 I422AlphaToABGRRow(src_y, src_u, src_v, src_a, dst_abgr, &kYuvConstants, wid
th); | 522 I422AlphaToABGRRow(src_y, src_u, src_v, src_a, dst_abgr, &kYuvConstants, |
| 523 width); |
| 538 if (attenuate) { | 524 if (attenuate) { |
| 539 ARGBAttenuateRow(dst_abgr, dst_abgr, width); | 525 ARGBAttenuateRow(dst_abgr, dst_abgr, width); |
| 540 } | 526 } |
| 541 dst_abgr += dst_stride_abgr; | 527 dst_abgr += dst_stride_abgr; |
| 542 src_a += src_stride_a; | 528 src_a += src_stride_a; |
| 543 src_y += src_stride_y; | 529 src_y += src_stride_y; |
| 544 if (y & 1) { | 530 if (y & 1) { |
| 545 src_u += src_stride_u; | 531 src_u += src_stride_u; |
| 546 src_v += src_stride_v; | 532 src_v += src_stride_v; |
| 547 } | 533 } |
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| 1895 src_u += src_stride_u; | 1881 src_u += src_stride_u; |
| 1896 src_v += src_stride_v; | 1882 src_v += src_stride_v; |
| 1897 } | 1883 } |
| 1898 return 0; | 1884 return 0; |
| 1899 } | 1885 } |
| 1900 | 1886 |
| 1901 #ifdef __cplusplus | 1887 #ifdef __cplusplus |
| 1902 } // extern "C" | 1888 } // extern "C" |
| 1903 } // namespace libyuv | 1889 } // namespace libyuv |
| 1904 #endif | 1890 #endif |
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