src/compiler/x64/instruction-scheduler-x64.cc - Issue 1375253002: [WIP][turbofan] Instruction scheduler for Turbofan.

Side by Side Diff: src/compiler/x64/instruction-scheduler-x64.cc

Issue 1375253002: [WIP][turbofan] Instruction scheduler for Turbofan. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master

Patch Set: Created 5 years ago

Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.

Jump to:

View unified diff | Download patch

OLD	NEW
(Empty)
	1 // Copyright 2015 the V8 project authors. All rights reserved.

	2 // Use of this source code is governed by a BSD-style license that can be

	3 // found in the LICENSE file.

	4

	5 #include "src/compiler/instruction-scheduler.h"

	6

	7 namespace v8 {

	8 namespace internal {

	9 namespace compiler {

	10

	11 int InstructionScheduler::GetTargetInstructionFlags(

	12 const Instruction* instr) const {

	13 switch (instr->arch_opcode()) {

	14 case kX64Add:

	15 case kX64Add32:

	16 case kX64And:

	17 case kX64And32:

	18 case kX64Cmp:

	19 case kX64Cmp32:

	20 case kX64Test:

	21 case kX64Test32:

	22 case kX64Or:

	23 case kX64Or32:

	24 case kX64Xor:

	25 case kX64Xor32:

	26 case kX64Sub:

	27 case kX64Sub32:

	28 case kX64Imul:

	29 case kX64Imul32:

	30 case kX64ImulHigh32:

	31 case kX64UmulHigh32:

	32 case kX64Idiv:

	33 case kX64Idiv32:

	34 case kX64Udiv:

	35 case kX64Udiv32:

	36 case kX64Not:

	37 case kX64Not32:

	38 case kX64Neg:

	39 case kX64Neg32:

	40 case kX64Shl:

	41 case kX64Shl32:

	42 case kX64Shr:

	43 case kX64Shr32:

	44 case kX64Sar:

	45 case kX64Sar32:

	46 case kX64Ror:

	47 case kX64Ror32:

	48 case kX64Lzcnt:

	49 case kX64Lzcnt32:

	50 case kX64Tzcnt:

	51 case kX64Tzcnt32:

	52 case kX64Popcnt:

	53 case kX64Popcnt32:

	54 case kSSEFloat32Cmp:

	55 case kSSEFloat32Add:

	56 case kSSEFloat32Sub:

	57 case kSSEFloat32Mul:

	58 case kSSEFloat32Div:

	59 case kSSEFloat32Abs:

	60 case kSSEFloat32Neg:

	61 case kSSEFloat32Sqrt:

	62 case kSSEFloat32Round:

	63 case kSSEFloat32Max:

	64 case kSSEFloat32Min:

	65 case kSSEFloat32ToFloat64:

	66 case kSSEFloat64Cmp:

	67 case kSSEFloat64Add:

	68 case kSSEFloat64Sub:

	69 case kSSEFloat64Mul:

	70 case kSSEFloat64Div:

	71 case kSSEFloat64Mod:

	72 case kSSEFloat64Abs:

	73 case kSSEFloat64Neg:

	74 case kSSEFloat64Sqrt:

	75 case kSSEFloat64Round:

	76 case kSSEFloat64Max:

	77 case kSSEFloat64Min:

	78 case kSSEFloat64ToFloat32:

	79 case kSSEFloat64ToInt32:

	80 case kSSEFloat64ToUint32:

	81 case kSSEFloat64ToInt64:

	82 case kSSEFloat64ToUint64:

	83 case kSSEInt32ToFloat64:

	84 case kSSEInt64ToFloat32:

	85 case kSSEInt64ToFloat64:

	86 case kSSEUint64ToFloat32:

	87 case kSSEUint64ToFloat64:

	88 case kSSEUint32ToFloat64:

	89 case kSSEFloat64ExtractLowWord32:

	90 case kSSEFloat64ExtractHighWord32:

	91 case kSSEFloat64InsertLowWord32:

	92 case kSSEFloat64InsertHighWord32:

	93 case kSSEFloat64LoadLowWord32:

	94 case kAVXFloat32Cmp:

	95 case kAVXFloat32Add:

	96 case kAVXFloat32Sub:

	97 case kAVXFloat32Mul:

	98 case kAVXFloat32Div:

	99 case kAVXFloat32Max:

	100 case kAVXFloat32Min:

	101 case kAVXFloat64Cmp:

	102 case kAVXFloat64Add:

	103 case kAVXFloat64Sub:

	104 case kAVXFloat64Mul:

	105 case kAVXFloat64Div:

	106 case kAVXFloat64Max:

	107 case kAVXFloat64Min:

	108 case kAVXFloat64Abs:

	109 case kAVXFloat64Neg:

	110 case kAVXFloat32Abs:

	111 case kAVXFloat32Neg:

	112 case kX64BitcastFI:

	113 case kX64BitcastDL:

	114 case kX64BitcastIF:

	115 case kX64BitcastLD:

	116 case kX64Lea32:

	117 case kX64Lea:

	118 case kX64Dec32:

	119 case kX64Inc32:

	120 return (instr->addressing_mode() == kMode_None)

	121 ? kNoOpcodeFlags

	122 : kIsLoadOperation \| kHasSideEffect;

	123

	124 case kX64Movsxbl:

	125 case kX64Movzxbl:

	126 case kX64Movsxwl:

	127 case kX64Movzxwl:

	128 case kX64Movsxlq:

	129 DCHECK(instr->InputCount() >= 1);

	130 return instr->InputAt(0)->IsRegister() ? kNoOpcodeFlags

	131 : kIsLoadOperation;

	132

	133 case kX64Movb:

	134 case kX64Movw:

	135 return kHasSideEffect;

	136

	137 case kX64Movl:

	138 if (instr->HasOutput()) {

	139 DCHECK(instr->InputCount() >= 1);

	140 return instr->InputAt(0)->IsRegister() ? kNoOpcodeFlags

	141 : kIsLoadOperation;

	142 } else {

	143 return kHasSideEffect;

	144 }

	145

	146 case kX64Movq:

	147 case kX64Movsd:

	148 case kX64Movss:

	149 return instr->HasOutput() ? kIsLoadOperation : kHasSideEffect;

	150

	151 case kX64StackCheck:

	152 return kIsLoadOperation;

	153

	154 case kX64Push:

	155 case kX64Poke:

	156 return kHasSideEffect;

	157

	158 #define CASE(Name) case k##Name:

	159 COMMON_ARCH_OPCODE_LIST(CASE)

	160 #undef CASE

	161 // Already covered in architecture independent code.

	162 UNREACHABLE();

	163 }

	164 }

	165

	166

	167 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) {

	168 // TODO(all): Add instruction cost modeling.

	169 return 1;

	170 }

	171

	172 } // namespace compiler

	173 } // namespace internal

	174 } // namespace v8

OLD	NEW

« src/compiler/ppc/instruction-scheduler-ppc.cc ('K') | « src/compiler/x64/code-generator-x64.cc ('k') | src/compiler/x87/code-generator-x87.cc » ('j') | no next file with comments »