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| 1 //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===// | 1 //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 645 if (Iter.Cur->mustHaveReg()) { | 645 if (Iter.Cur->mustHaveReg()) { |
| 646 if (Kind == RAK_Phi) | 646 if (Kind == RAK_Phi) |
| 647 addSpillFill(Iter); | 647 addSpillFill(Iter); |
| 648 else | 648 else |
| 649 Func->setError("Unable to find a physical register for an " | 649 Func->setError("Unable to find a physical register for an " |
| 650 "infinite-weight live range"); | 650 "infinite-weight live range"); |
| 651 } | 651 } |
| 652 } else { | 652 } else { |
| 653 // Evict all live ranges in Active that register number MinWeightIndex is | 653 // Evict all live ranges in Active that register number MinWeightIndex is |
| 654 // assigned to. | 654 // assigned to. |
| 655 const llvm::SmallBitVector &Aliases = *RegAliases[MinWeightIndex]; |
| 655 for (SizeT I = Active.size(); I > 0; --I) { | 656 for (SizeT I = Active.size(); I > 0; --I) { |
| 656 const SizeT Index = I - 1; | 657 const SizeT Index = I - 1; |
| 657 Variable *Item = Active[Index]; | 658 Variable *Item = Active[Index]; |
| 658 if (Item->getRegNumTmp() == MinWeightIndex) { | 659 int32_t RegNum = Item->getRegNumTmp(); |
| 659 dumpLiveRangeTrace("Evicting ", Item); | 660 if (Aliases[RegNum]) { |
| 660 const llvm::SmallBitVector &Aliases = *RegAliases[MinWeightIndex]; | 661 dumpLiveRangeTrace("Evicting A ", Item); |
| 661 for (int32_t RegAlias = Aliases.find_first(); RegAlias >= 0; | 662 --RegUses[RegNum]; |
| 662 RegAlias = Aliases.find_next(RegAlias)) { | 663 assert(RegUses[RegNum] >= 0); |
| 663 --RegUses[RegAlias]; | |
| 664 assert(RegUses[RegAlias] >= 0); | |
| 665 } | |
| 666 Item->setRegNumTmp(Variable::NoRegister); | 664 Item->setRegNumTmp(Variable::NoRegister); |
| 667 moveItem(Active, Index, Handled); | 665 moveItem(Active, Index, Handled); |
| 668 } | 666 } |
| 669 } | 667 } |
| 670 // Do the same for Inactive. | 668 // Do the same for Inactive. |
| 671 for (SizeT I = Inactive.size(); I > 0; --I) { | 669 for (SizeT I = Inactive.size(); I > 0; --I) { |
| 672 const SizeT Index = I - 1; | 670 const SizeT Index = I - 1; |
| 673 Variable *Item = Inactive[Index]; | 671 Variable *Item = Inactive[Index]; |
| 674 // Note: The Item->rangeOverlaps(Cur) clause is not part of the | 672 // Note: The Item->rangeOverlaps(Cur) clause is not part of the |
| 675 // description of AssignMemLoc() in the original paper. But there doesn't | 673 // description of AssignMemLoc() in the original paper. But there doesn't |
| 676 // seem to be any need to evict an inactive live range that doesn't | 674 // seem to be any need to evict an inactive live range that doesn't |
| 677 // overlap with the live range currently being considered. It's | 675 // overlap with the live range currently being considered. It's |
| 678 // especially bad if we would end up evicting an infinite-weight but | 676 // especially bad if we would end up evicting an infinite-weight but |
| 679 // currently-inactive live range. The most common situation for this | 677 // currently-inactive live range. The most common situation for this |
| 680 // would be a scratch register kill set for call instructions. | 678 // would be a scratch register kill set for call instructions. |
| 681 if (Item->getRegNumTmp() == MinWeightIndex && | 679 if (Aliases[Item->getRegNumTmp()] && Item->rangeOverlaps(Iter.Cur)) { |
| 682 Item->rangeOverlaps(Iter.Cur)) { | 680 dumpLiveRangeTrace("Evicting I ", Item); |
| 683 dumpLiveRangeTrace("Evicting ", Item); | |
| 684 Item->setRegNumTmp(Variable::NoRegister); | 681 Item->setRegNumTmp(Variable::NoRegister); |
| 685 moveItem(Inactive, Index, Handled); | 682 moveItem(Inactive, Index, Handled); |
| 686 } | 683 } |
| 687 } | 684 } |
| 688 // Assign the register to Cur. | 685 // Assign the register to Cur. |
| 689 Iter.Cur->setRegNumTmp(MinWeightIndex); | 686 Iter.Cur->setRegNumTmp(MinWeightIndex); |
| 690 const llvm::SmallBitVector &Aliases = *RegAliases[MinWeightIndex]; | |
| 691 for (int32_t RegAlias = Aliases.find_first(); RegAlias >= 0; | 687 for (int32_t RegAlias = Aliases.find_first(); RegAlias >= 0; |
| 692 RegAlias = Aliases.find_next(RegAlias)) { | 688 RegAlias = Aliases.find_next(RegAlias)) { |
| 693 assert(RegUses[RegAlias] >= 0); | 689 assert(RegUses[RegAlias] >= 0); |
| 694 ++RegUses[RegAlias]; | 690 ++RegUses[RegAlias]; |
| 695 } | 691 } |
| 696 Active.push_back(Iter.Cur); | 692 Active.push_back(Iter.Cur); |
| 697 dumpLiveRangeTrace("Allocating ", Iter.Cur); | 693 dumpLiveRangeTrace("Allocating ", Iter.Cur); |
| 698 } | 694 } |
| 699 } | 695 } |
| 700 | 696 |
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| 944 Str << "\n"; | 940 Str << "\n"; |
| 945 } | 941 } |
| 946 Str << "++++++ Inactive:\n"; | 942 Str << "++++++ Inactive:\n"; |
| 947 for (const Variable *Item : Inactive) { | 943 for (const Variable *Item : Inactive) { |
| 948 dumpLiveRange(Item, Func); | 944 dumpLiveRange(Item, Func); |
| 949 Str << "\n"; | 945 Str << "\n"; |
| 950 } | 946 } |
| 951 } | 947 } |
| 952 | 948 |
| 953 } // end of namespace Ice | 949 } // end of namespace Ice |
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