src/mips/lithium-codegen-mips.cc - Issue 13724002: MIPS: Remove conflicting FPU check for code generation in soft-float mode.

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Unified Diff: src/mips/lithium-codegen-mips.cc

Issue 13724002: MIPS: Remove conflicting FPU check for code generation in soft-float mode. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge

Patch Set: Created 7 years, 8 months ago

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Index: src/mips/lithium-codegen-mips.cc

diff --git a/src/mips/lithium-codegen-mips.cc b/src/mips/lithium-codegen-mips.cc

index 95a1e05d1e67bdda228f381f572c1ab10469f44f..60ba788cce6dd66d84a7ff2b858fc08915616fff 100644

--- a/src/mips/lithium-codegen-mips.cc

+++ b/src/mips/lithium-codegen-mips.cc

@@ -65,7 +65,6 @@ bool LCodeGen::GenerateCode() {

HPhase phase("Z_Code generation", chunk());

ASSERT(is_unused());

status_ = GENERATING;

- CpuFeatureScope scope(masm(), FPU);

// Open a frame scope to indicate that there is a frame on the stack. The

// NONE indicates that the scope shouldn't actually generate code to set up

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